Datasheet AD5235-EP (Analog Devices) - 6

AD5235-EP Enhanced Product Timing Diagrams CPHA = 1 CS t12 t t 3 13 t t 1 2 CLK t CPOL = 1 5 B23 B0 t17 t4 t7 t6 HIGH HIGH OR LOW OR LOW SDI B23 (MSB) B0 (LSB) t t 8 t 11 t9 10 SDO B24* B23 (MSB) B0 (LSB) t14 t15 t16 RDY *THE EXTRA BIT THAT IS NOT DEFINED IS NORMALLY THE LSB OF THE CHARACTER PREVIOUSLY TRANSMITTED.
002
THE CPOL = 1 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
09185- Figure 2. CPHA = 1 Timing Diagram
CPHA = 0 CS t12 t1 t t 3 13 t2 t5 B23 B0 t17 CLK CPOL = 0 t4 t7 t6 HIGH HIGH OR LOW OR LOW SDI B23 (MSB IN) B0 (LSB) t8 t10 t11 t9 SDO B23 (MSB OUT) B0 (LSB) * t14 t15 t16 RDY *THE EXTRA BIT THAT IS NOT DEFINED IS NORMALLY THE MSB OF THE CHARACTER JUST RECEIVED.
003
THE CPOL = 0 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
09185- Figure 3. CPHA = 0 Timing Diagram Rev. B | Page 6 of 14 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS INTERFACE TIMING AND EEMEM RELIABILITY CHARACTERISTICS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE