[AK7604] ■ Serial Data Interface (SDIN1 ~ SDIN4, SDOUT1 ~ SDOUT3) (Ta=-40 ~ 85C; AVDD=3.0~3.6V; LVDD=3.0~3.6V; TVDD=1.7~3.6V; VDD33=3.0~3.6V; VSS1=VSS2=VSS3=VSS4=0V; CL=20pF) Parameter Symbol Min. Typ. Max. Unit Slave Mode Delay Time from BICK “↑” to LRCK * 39 tBLRD 10 ns Delay Time from LRCK to BICK “↑” * 39 tLRBD 10 ns Serial Data Input Latch Setup Time tBSIDS 10 ns Serial Data Input Latch Hold Time tBSIDH 5 ns Delay Time from BICK “↓” to Serial Data Output * 40 tBSOD1 20 ns Delay Time from BICK “↑”to Serial Data Output * 39, * 41 tBSOD2 5 30 ns Master Mode 32, 48, 64, BICK Frequency fBCLK fs 128, 256 BICK Duty Cycle 50 % Delay Time from BICK “↓” to LRCK * 40 tMBL -10 10 ns Serial Data Input Latch Setup Time tBSIDS 10 ns Serial Data Input Latch Hold Time tBSIDH 10 ns Delay Time from BICK “↓” to Serial Data Output * 40, * 41 tBSOD 10 ns Notes * 39. It is measured from BICK “↓” when the BICK polarity is inverted by setting BCKPx bit = “1”. * 40. It is measured from BICK “↑” when the BICK polarity is inverted by setting BCKPx bit = “1”. * 41. Set SDOPHx bit to “1” and the data from SDOUTx pin is output based on BICK “↑” when BICK speed is more than 12.288MHz such as when using TDM256 mode with 96kHz sampling frequency or TDM128 mode with 192kHz sampling frequency in slave mode. SDOPHx bit must be set to “0” in master mode. 018011601-E-00-PB 2018/09 -25 -