Contact : Gonzalo Picún (+32-10-489214) May. 19High Temperature Automotive Configurable Logic GatesPreliminary DatasheetParameter Measurement Information (notes4,5) From Output Under Test CL RL VDD Inputs VM CL RL VI tr/tf 1.8V± 0.15V 30pF 1000Ω 2.5V±0.2V 30pF 500Ω VDD ≤ 2ns VDD/2 3.3V±0.3V 50pF 500Ω 5V±0.5V 50pF 500Ω CXT-741G57/CXT-741G58/CXT-741G97 A/B/C VM VM t t PLH PHL Y VM VM tPHL tPLH Y VM VM Voltage WaveformPropagation Delay timesInverting and Non Inverting OutputsCXT-741G175 CLK VM VM t CLK PLH Q VM D VM VM tPHL tsu th Q VM Voltage WaveformVoltage WaveformPropagation Delay times wrt CLKSet-up and Hold times wrt CLK CLRB VM tPCLRB Q VM Voltage WaveformPropagation Delay times wrt CLRB Note 4 CL load capacitance includes PCB and probe capacitance Note 5 : tPHL and tPLH are the same as tPD PUBLICDoc. PDS-192011 V1.0WWW.CISSOID.COM 9 of 12
