Datasheet MA12040 (Infineon) - 3

3 Typical Application Block Diagram
100nF 1µF 1µF 1µF CFGD CGD0 CGD1 CFDC VDD VDD CGDC 1µF P N D 0P P C D 0N 1P N 1N C C D AVDD D D G D G D FD G DVDD CFG CFG C G V C C CG CFD C 1µF 1µF AVSS DVSS Analog CREF power C 1µF CDC DC 1µF PVDD and Charge pump power supplies 1µF CMSE reference PVDD voltages + 1µF 1µF PVSS 470µF Bypass PVDD 10µF IN0A Power OUT0A LP filter C amp in CF0AP 10µF Audio In 0 Bypass PVDD CF0AN PVSS CF0A 10µF IN0B Power OUT0B LP filter tion C amp in ra CF0BP 10µF igu CF0BN nf Bypass PVSS CF0B PVDD l co 10µF IN1A ne Power OUT1A LP filter C han amp in C CF1AP 10µF Bypass PVDD CF1AN Audio In 1 PVSS CF1A 10µF IN1B Power OUT1B LP filter C amp in CF1BP 10µF CF1BN C EMC filter PVSS F1B depending on application Power Temp management sensor Clock management Control and protection /S 0 1 E LE R B O L A 0 1 UT A SEL SEL IP EPAD LKM LKI D D C C M M SC SD A A /M /EN /CL /ERRO Host system
Figure 3-1 Typical application block diagram
Datasheet Please read the Important Notice and Warnings at the end of this document V 1.0
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page 3 of 86 2018-07-17