Datasheet ADuM4121/ADuM4121-1 (Analog Devices) - 10

ADuM4121/ADuM4121-1 Data Sheet 40 0.9 tF PMOS t NMOS R 35 0.8 0.7 30 ) ns 0.6 ( 25 E 0.5 (Ω) 20 N LL TIM O DS 0.4 /FA R E 15 IS 0.3 R 10 0.2 5 0.1 0 0 4.5 9.5 13.5 19.5 24.5 29.5 34.5
15 13 1
4.5 9.0 13.5 18.0 22.5 27.0 31.5
1
VDD2 (V) V
14967-
DD2 (V)
14967- Figure 16. Rise and Fall Time vs. VDD2, 2 nF Load, 3.9 Ω Resistor Figure 18. Typical Output Resistance (RDSON) vs. VDD2
9 1.2 SOURCE CURRENT PMOS SINK CURRENT NMOS 8 1.0 7 A) ( NT 6 0.8 5 (Ω) CURRE N 0.6 O UT P 4 DSR UT 3 0.4 AK O E P 2 0.2 1 0 0
12
4.5 9.5 14.5 19.5 24.5 29.5 34.5
16 1
–40 10 60 110
1
VDD2 (V) TEMPERATURE (°C)
14967- 14967- Figure 17. Peak Output Current vs. VDD2, 2 Ω Series Resistance Figure 19. Typical Output Resistance (RDSON) vs. Temperature, VDD2 = 15 V Rev. 0| Page 10 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS REGULATORY INFORMATION PACKAGE CHARACTERISTICS INSULATION AND SAFETY-RELATED SPECIFICATIONS DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS RECOMMENDED OPERATING CONDITIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION PRINTED CIRCUIT BOARD (PCB) LAYOUT VI+ and VI− Operation PROPAGATION DELAY-RELATED PARAMETERS UNDERVOLTAGE LOCKOUT (UVLO) OUTPUT LOAD CHARACTERISTICS Miller Clamp POWER DISSIPATION INSULATION LIFETIME TYPICAL APPLICATIONS OUTLINE DIMENSIONS ORDERING GUIDE