Datasheet AD7766-KGD (Analog Devices) - 7
| Производитель | Analog Devices |
| Описание | 24-Bit, 8.5 mW, 109 dB, 128 kSPS/64 kSPS/32 kSPS ADCs |
| Страниц / Страница | 11 / 7 — Known Good Die. AD7766-2-KGD. MCLK. DRDY (A). SDO (A). MSB (A). LSB (A) … |
| Формат / Размер файла | PDF / 242 Кб |
| Язык документа | английский |
Known Good Die. AD7766-2-KGD. MCLK. DRDY (A). SDO (A). MSB (A). LSB (A) MSB (B). LSB (B) MSB (C). LSB (C). SCLK. t16. t17. MSB (B)
34 предложений от 16 поставщиков Микросхема Преобразователь AD, Analog to Digital Converters - ADC 24Bit 8.5mW 109dB 128/64/32KSPS |
| AD7766BRUZ-RL7
Analog Devices | 496 ₽ | |
| AD7766BRUZ-RL7
Analog Devices | от 719 ₽ | |
| AD7766BRUZ-RL7
Analog Devices | 757 ₽ | |
| AD7766BRUZ-RL7
Analog Devices | 1 237 ₽ | |
Модельный ряд для этого даташита
Текстовая версия документа
Known Good Die AD7766-2-KGD MCLK 1 DRDY (A) CS SDO (A) MSB (A) LSB (A) MSB (B) LSB (B) MSB (C) LSB (C) SCLK t16 t17
5 1 0
MSB (B) LSB (B) MSB (C) LSB (C) MSB (D) LSB (D)
6-
SDI (A) = SDO (B)
80 13 Figure 5. Daisy-Chain SDI Setup and Hold Timing
PART OUT OF POWER-DOWN FILTER RESET PART IN POWER-DOWN BEGINS SAMPLING MCLK (I) A B C D t t20 18 SYNC/PD (I) t t 19 21 DRDY (O) tSETTLING
05 0
SDO (O) VALID DATA INVALID DATA VALID DATA
6- 380 1 Figure 6. Reset, Synchronization, and Power-Down Timing Rev. 0 | Page 7 of 11 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM RELATED DEVICES TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE
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