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Datasheet AD7766-KGD (Analog Devices) - 10

ПроизводительAnalog Devices
Описание24-Bit, 8.5 mW, 109 dB, 128 kSPS/64 kSPS/32 kSPS ADCs
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AD7766-2-KGD. Known Good Die. Pad No. X-Axis (µm). Y-Axis (µm). Mnemonic Pad Type. Description

AD7766-2-KGD Known Good Die Pad No X-Axis (µm) Y-Axis (µm) Mnemonic Pad Type Description

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AD7766-2-KGD Known Good Die Pad No. X-Axis (µm) Y-Axis (µm) Mnemonic Pad Type Description
7 −353 −1319 DVDD Single Digital Power Supply Input, 2.5 V. In cases where a logic voltage of 2.5 V for interfacing is used (2.5 V applied to VDRIVE pin), the DVDD and VDRIVE pins can be connected to the same voltage supply rail. 8 −141 −1317 DVDD Single Digital Power Supply Input, 2.5 V. In cases where a logic voltage of 2.5 V for interfacing is used (2.5 V applied to VDRIVE pin), the DVDD and VDRIVE pins can be connected to the same voltage supply rail. 9 +105 −1340 VDRIVE Single Logic Power Supply Input, 1.8 V to 3.6 V. The voltage supplied at this pin determines the operating voltage of the digital logic interface. 10 +601 −1336 VDRIVE Single Logic Power Supply Input, 1.8 V to 3.6 V. The voltage supplied at this pin determines the operating voltage of the digital logic interface. 11 +799 −1161 SDO Double Serial Data Output. The conversion result from the AD7766-2-KGD is output on the SDO pin as a 24-bit, twos complement, MSB first, serial data stream. 12 +784 −944 DGND Single Digital Logic Power Supply Ground. 13 +784 −826 DGND Single Digital Logic Power Supply Ground. 14 +784 −677 DGND Single Digital Logic Power Supply Ground. 15 +800 −517 DRDY Single Data Ready Output. A falling edge on the DRDY signal indicates that a new conversion data result is available in the output register of the AD7766-2-KGD. 16 +800 +363 SCLK Single Serial Clock Input. The SCLK input provides the serial clock for all serial data transfers with AD7766-2-KGD devices. 17 +800 +663 MCLK Single Master Clock Input. The sampling frequency of the AD7766-2-KGD is equal to the MCLK frequency. 18 +800 +850 SDI Single Serial Data Input. This pin is the daisy-chain input of the AD7766-2-KGD. 19 +800 +1051 CS Single Chip Select Input. The CS input selects a specific AD7766-2-KGD device and acts as an enable on the SDO pin. In cases where CS is used, the MSB of the conversion result is clocked onto the SDO line on the CS falling edge. The CS input allows multiple AD7766-2-KGD devices to share the same SDO line. This function allows the user to select the appropriate device by supplying it with a logic low CS signal, which enables the SDO pin of the concerned device. 20 −125 +1319 AVDD Single Analog Power Supply, 2.5 V. 21 −333 +1319 AVDD Single Analog Power Supply, 2.5 V. 22 −561 +1317 VREF+ Single Reference Input for the AD7766-2-KGD. Apply an external reference to this input pin. The VREF+ input ranges from 2.4 V to 5 V. The reference voltage input is independent of the voltage magnitude applied to the AVDD pin. 23 −667 +1317 VREF+ Single Reference Input for the AD7766-2-KGD. Apply an external reference to this input pin. The VREF+ input ranges from 2.4 V to 5 V. The reference voltage input is independent of the voltage magnitude applied to the AVDD pin. Rev. 0 | Page 10 of 11 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM RELATED DEVICES TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE
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