Datasheet AD7476-EP (Analog Devices) - 9

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AD7476-EP OUTLINE DIMENSIONS 3.00 2.90 2.80 6 5 4 3.00 1.70 2.80 1.60 2.60 1.50 1 2 3 PIN 1 INDICATOR 0.95 BSC 1.90 BSC 1.30 1.15 0.90 1.45 MAX 0.20 MAX 0.95 MIN 0.08 MIN 0.55 0.15 MAX 10° 0.45 SEATING 0.05 MIN 4° 0.60 0.50 MAX PLANE BSC 0.35 0° 0.30 MIN -A 08 16 COMPLIANT TO JEDEC STANDARDS MO-178-AB 12
Figure 6. 6-Lead Small Outline Transistor Package [SOT-23] (RJ-6) Dimensions shown in millimeters
ORDERING GUIDE Model 1 Temperature Range Linearity Error (LSB) 2 Package Description Package Option Branding
AD7476SRTZ-EP-RL7 −55°C to +125°C ±1.5 maximum 6-Lead SOT-23 RJ-6 C73# 1 Z = RoHS Compliant Part, # denotes RoHS compliant part maybe top or bottom marked. 2 Linearity error refers to integral linearity error. Rev. 0 | Page 9 of 12 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE