Datasheet AD9218-EP (Analog Devices) - 6

AD9218-EP Enhanced Product SWITCHING SPECIFICATIONS
VDD = 3.0 V, VD = 3.0 V; external reference, unless otherwise noted.
Table 4. Parameter Temperature Test Level Min Typ Max Unit
ENCODE INPUT PARAMETERS Maximum Encode Rate Full VI 105 MSPS Minimum Encode Rate Full IV 20 MSPS Encode Pulse Width High (tEH) Full IV 3.8 ns Encode Pulse Width Low (tEL) Full IV 3.8 ns Aperture Delay (tA) 25°C V 2 ns Aperture Uncertainty (Jitter) 25°C V 3 ps rms DIGITAL OUTPUT PARAMETERS Output Valid Time (tV)1 Full VI 2.5 ns Output Propagation Delay (tPD)1 Full VI 4.5 6 ns Output Rise Time (tR) 25°C V 1.0 ns Output Fall Time (tF) 25°C V 1.2 ns Out-of-Range Recovery Time 25°C V 5 ns Transient Response Time 25°C V 5 ns Recovery Time from Power-Down 25°C V 10 Cycles Pipeline Delay Full IV 5 Cycles 1 tV and tPD are measured from the 1.5 level of the ENCx input to the 50%/50% levels of the digital outputs swing. The digital output load during test must not exceed an ac load of 5 pF or a dc current of ±40 µA. Rise and fall times are measured from 10% to 90%.
TIMING DIAGRAMS SAMPLE SAMPLE SAMPLE SAMPLE N N + 1 N + 5 N + 6 AINA AINB SAMPLE SAMPLE SAMPLE tA N + 2 N + 3 N + 4 tEL tEH 1/fS ENCA ENCB tPD tV D9A TO D0A DATA N – 5 DATA N – 4 DATA N – 3 DATA N – 2 DATA N – 1 DATA N
002
D9 DATA N – 5 DATA N – 4 DATA N – 3 DATA N – 2 DATA N – 1 DATA N B TO D0B
17309- Figure 2. Normal Operation, Same Clock (S1 = 1, S2 = 0) Channel Timing Rev. 0 | Page 6 of 11 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE