Datasheet ADL5331 (Analog Devices) - 5

Data Sheet ADL5331 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS IN L GA ENB VPS2 VPS2 VPS2 VPS2 24 23 22 21 20 19 VPS1 1 18 VPS2 COM1 2 17 COM2 INHI 3 ADL5331 16 OPHI INLO 4 TOP VIEW 15 OPLO (Not to Scale) COM1 5 14 COM2 VPS1 6 13 VPS2 7 8 9 10 11 12 2 2 2 NC M M M PBS IPBS O CO CO CO NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD. THE EXPOSED PAD MUST BE
002
CONNECTED TO GROUND VIA A LOW IMPEDANCE PATH, BOTH THERMALLY AND ELECTRICALLY.
07593- Figure 2. Pin Configuration
Table 3. Pin Function Descriptions Pin No. Mnemonic Description
1, 6 VPS1 Positive Supply. Nominally equal to 5 V. 2, 5 COM1 Common for the Input Stage. 3, 4 INHI, INLO Differential Inputs, AC-Coupled. 7 NC No Connect. 8 IPBS Input Bias. Normally ac-coupled to VPS1. A 10 nF capacitor is recommended. 9 OPBS Output Bias. Internally compensated, do not connect externally. 10 to 12, 14, 17 COM2 Common for the Output Stage. 13, 18 to 22 VPS2 Positive Supply. Nominally equal to 5 V. 15, 16 OPLO, OPHI Differential Outputs. Bias to VPOS with RF chokes. 23 ENBL Device Enable. Apply logic high for normal operation. 24 GAIN Gain Control Voltage Input. Nominal range is 0 V to 1.4 V. EPAD Exposed Pad. Exposed pad must be connected to via a low impedance path, both thermally and electrically. Rev. A | Page 5 of 15 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION BASIC CONNECTIONS GAIN CONTROL INPUT CMTS TRANSMIT APPLICATION Interfacing to AD9789 INTERFACING TO AN IQ MODULATOR SOLDERING INFORMATION EVALUATION BOARD SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE