Datasheet AD8331-EP (Analog Devices) - 7

Enhanced Product AD8331-EP PIN CONFIGURATION AND FUNCTION DESCRIPTIONS LMD 1 20 COMM PIN 1 INH 2 INDICATOR 19 ENBL VPSL 3 18 ENBV LON 4 17 COMM AD8331-EP LOP 5 16 VOL TOP VIEW COML 6 15 VOH (Not to Scale) VIP 7 14 VPOS VIN 8 13 HILO MODE 9 12 RCLMP
003
GAIN 10 11 VCM
20775- Figure 3. Pin Configuration
Table 4. Pin Function Description Pin No. Mnemonic Description
1 LMD LNA Midsupply Bypass Pin. Connect a capacitor to LMD to achieve a midsupply high frequency bypass. 2 INH LNA Input. 3 VPSL LNA 5 V Supply. 4 LON LNA Inverting Output. 5 LOP LNA Noninverting Output. 6 COML LNA Ground. 7 VIP VGA Noninverting Input. 8 VIN VGA Inverting Input. 9 MODE Gain Slope Logic Input. 10 GAIN Gain Control Voltage. 11 VCM Common-Mode Voltage. 12 RCLMP Output Clamping Level. 13 HILO Gain Range Select (High or Low). 14 VPOS VGA 5 V Supply. 15 VOH Noninverting VGA Output. 16 VOL Inverting VGA Output. 17, 20 COMM VGA Grounds. 18 ENBV VGA Enable. 19 ENBL LNA Enable. Rev. 0 | Page 7 of 9 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS POWER DERATING CURVES THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE