Datasheet ADRF6516 (Analog Devices) - 2

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ADRF6516 Data Sheet TABLE OF CONTENTS
Features .. 1 Maximizing the Dynamic Range.. 19 Applications ... 1 Key Parameters for Quadrature-Based Receivers .. 20 Functional Block Diagram .. 1 Applications Information .. 21 General Description ... 1 Basic Connections .. 21 Revision History ... 2 Supply Decoupling ... 21 Specifications ... 3 Input Signal Path .. 21 Timing Diagrams .. 5 Output Signal Path ... 21 Absolute Maximum Ratings .. 6 DC Offset Compensation Loop Enabled .. 21 ESD Caution .. 6 Common-Mode Bypassing ... 21 Pin Configuration and Function Descriptions ... 7 Serial Port Connections ... 22 Typical Performance Characteristics ... 8 Enable/Disable Function ... 22 Register Map and Codes .. 15 Error Vector Magnitude (EVM) Performance ... 22 Theory of Operation .. 16 EVM Test Setup .. 22 Input Buffers ... 16 Effect of Filter Bandwidth on EVM ... 22 Programmable Filters ... 16 Effect of Output Voltage Levels on EVM .. 23 Variable Gain Amplifiers (VGAs) .. 17 Effect of COFS Value on EVM ... 23 Output Buffers/ADC Drivers ... 17 Evaluation Board .. 24 DC Offset Compensation Loop .. 17 Evaluation Board Control Software ... 24 Programming the Filters and Gains ... 18 Schematics and Artwork ... 25 Noise Characteristics ... 18 Outline Dimensions ... 29 Distortion Characteristics ... 19 Ordering Guide .. 29
REVISION HISTORY 8/2017—Rev. B to Rev. C
Change to Figure 4 ... 7 Updated Outline Dimensions .. 29 Changes to Ordering Guide Section .. 29
2/2012—Rev. A to Rev. B
Changes to Figure 57 .. 24 Changes to Figure 58 .. 25 Added Figure 59 .. 26 Changes to Figure 60 and Figure 61 ... 27 Changes to Table 6 .. 27
9/2011—Revision A: Initial Version
Rev. C | Page 2 of 29 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS REGISTER MAP AND CODES THEORY OF OPERATION INPUT BUFFERS PROGRAMMABLE FILTERS VARIABLE GAIN AMPLIFIERS (VGAs) OUTPUT BUFFERS/ADC DRIVERS DC OFFSET COMPENSATION LOOP PROGRAMMING THE FILTERS AND GAINS NOISE CHARACTERISTICS DISTORTION CHARACTERISTICS MAXIMIZING THE DYNAMIC RANGE KEY PARAMETERS FOR QUADRATURE-BASED RECEIVERS APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DC OFFSET COMPENSATION LOOP ENABLED COMMON-MODE BYPASSING SERIAL PORT CONNECTIONS ENABLE/DISABLE FUNCTION ERROR VECTOR MAGNITUDE (EVM) PERFORMANCE EVM TEST SETUP EFFECT OF FILTER BANDWIDTH ON EVM EFFECT OF OUTPUT VOLTAGE LEVELS ON EVM EFFECT OF COFS VALUE ON EVM EVALUATION BOARD EVALUATION BOARD CONTROL SOFTWARE SCHEMATICS AND ARTWORK OUTLINE DIMENSIONS ORDERING GUIDE