HMC625BLP5E v02.0616 0.5 dB LSB GaAs MMIC 6-BIT DIGITALVARIABLE GAIN AMPLIFIER, DC - 5 GHzPin Descriptions Pin Number Function Description Interface Schematic T This pin is DC coupled. M 1 AMPIN An off chip DC blocking capacitor is required. L - S RF output and DC bias (Vcc) for 29 AMPOUT the output stage of the amplifier. ITA IG 2, 3, 13, These pins and package bottom GND 28, 30 - 32 must be connected to RF/DC ground. These pins are DC coupled and matched to 50 Ohms. ATTIN, S - D 4, 12 Blocking capacitors are required. Select value based ATTOUT on lowest frequency of operation. R IE 5 - 10 ACG1 - ACG6 External capacitors to ground is required. Select value for lowest frequency of operation. Place capacitor as close to pins as possible. The pins are not connected internally; however, all data shown LIF 11 N/C herein was measured with these pins connected to RF/DC ground P externally. M IN A A 14 SEROUT Serial input data delayed by 6 clock cycles. LE G B IA 15, 16 PUP2, PUP1 R D5, D4, D3, 18 - 23 A D2, D1, D0 V 24 P/S 25 CLK 26 SERIN 27 LE 17 Vdd Supply Voltage For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com 7 Application Support: Phone: 1-800-ANALOG-D Document Outline Typical Applications Features Functional Diagram General Description Electrical Specifications Typical Performance Characteristics Maximum Gain vs. Frequency Normalized Attenuation [2 Input Return Loss [2] Output Return Loss [2] Bit Error vs. Frequency [2] Bit Error vs. Attenuation State [2] Normal Relative Phase vs. Frequency [2] Step Error vs. Frequency [2] Serial Control Interface Parallel Mode (Direct Parallel Mode & Latched Parallel Mode) Power-Up States PUP Truth Table Power-On Sequence Absolute Maximum Ratings Truth Table Bookmark 24 Bias Voltage Outline Drawing Package Information Pin Descriptions Application Circuit Evaluation PCB List of Materials for Evaluation PCB 116960 - HMC625ALP5 [1]
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