HMC627ALP5E v00.1212 0.5 dB LSB GaAs MMIC 6-BIT DIGITALVARIABLE GAIN AMPLIFIER, 50 MHz - 1 GHzPower-Up StatesPUP Truth Table If LE is set to logic LOW at power-up, the logic state of Gain Relative to Maximum PUP1 and PUP2 determines the power-up state of the LE PUP1 PUP2 Gain part per PUP truth table. If the LE is set to logic HIGH 0 0 0 -31.5 T at power-up, the logic state of D0-D5 determines the 0 1 0 -24 M power-up state of the part per truth table. The DVGA 0 0 1 -16 latches in the desired power-up state approximately 0 1 1 Insertion Loss 200 ms after power-up. 1 X X 0 to -31.5 dB L - S Note: The logic state of D0 - D5 determines the ITA Power-On Sequence power-up state per truth table shown below when LE The ideal power-up sequence is: GND, Vdd, digital is high at power-up. IG inputs, RF inputs. The relative order of the digital inputs are not important as long as they are powered after Vdd / GND S - D R Absolute Maximum RatingsTruth Table IE RF Input Power [1] Control Voltage Input Gain 11.5 dBm (T = +85 °C) (At Max Gain Setting) Relative to LIF Maximum Digital Inputs (Reset, Shift Clock, D5 D4 D3 D2 D1 D0 -0.5V to Vdd +0.5V Gain P Latch Enable & Serial Input) High High High High High High 0 dB M Bias Voltage (Vdd) 5.6V High High High High High Low -0.5 dB Collector Bias Voltage (Vcc) 5.5V High High High High Low High -1 dB Channel Temperature 150 °C IN A High High High Low High High -2 dB Continuous Pdiss (T = 85 °C) 0.59 W A (derate 9 mW/°C above 85 °C) [2] High High Low High High High -4 dB Thermal Resistance [3] 110 °C/W High Low High High High High -8 dB Storage Temperature -65 to +150 °C Low High High High High High -16 dB LE G Operating Temperature -40 to +85 °C Low Low Low Low Low Low -31.5 dB B [1] The maximum RF input power increases by the same amount Any combination of the above states will provide a reduction in the gain is reduced. The maximum input power at any state is no gain approximately equal to the sum of the bits selected. IA more than 28 dBm. R [2] This value is the total power dissipation in the amplifier. Control Voltage Table A [3] This is the thermal resistance for the amplifier. V State Vdd = +3V Vdd = +5V Low 0 to 0.5V @ <1 µA 0 to 0.8V @ <1 µA High 2 to 3V @ <1 µA 2 to 5V @ <1 µA Bias Voltage Vdd (V) Idd (Typ.) (mA) +5 2.5 Vs (V) Is (mA) ELECTROSTATIC SENSITIVE DEVICE +5 88 OBSERVE HANDLING PRECAUTIONS I F nf o or r p mati r o in cfe ur , d nish e e l d iv b e y r A y a nalo n g d t Devi o p ces i la s c bele o ieve rd d t e o rbs e : H acc iutrtatite e M and ic reli rao bl w e. a H v o e C wever o , nrp o For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other oration, 2 Elizabeth Drive, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 O rights of third parties that may result from its use. Specifications subject to change without notice. No rd Phoe n r O e: 7 n- 81-li 3 n 2 e a 9-4 t w 70 ww 0 • O . rdh e itt r o it nle i . n co e a m license is granted by implication or otherwise under any patent or patent rights of Analog Devices. t www.analog.com 6 Application Support: Phon Trademarks and registered trademarks are the property of their respective owners. e: 978-250-334 A 3 o pplic r a atio pp n S s u @ p h por ittti : Pte ho.c n o e m : 1-800-ANALOG-D
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