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Datasheet HMC680LP4, 680LP4E (Analog Devices) - 4

ПроизводительAnalog Devices
ОписаниеBiCMOS 5-Bit Digital Variable Gain Amplifier SMT, 30 - 400 MHz
Страниц / Страница8 / 4 — HMC680LP4 / 680LP4E. BiCMOS MMIC 5-BIT DIGITAL. VARIABLE GAIN AMPLIFIER, …
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Язык документаанглийский

HMC680LP4 / 680LP4E. BiCMOS MMIC 5-BIT DIGITAL. VARIABLE GAIN AMPLIFIER, 30 - 400 MHz. Harmonics vs. Frequency

HMC680LP4 / 680LP4E BiCMOS MMIC 5-BIT DIGITAL VARIABLE GAIN AMPLIFIER, 30 - 400 MHz Harmonics vs Frequency

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HMC680LP4 / 680LP4E
v03.0609
BiCMOS MMIC 5-BIT DIGITAL VARIABLE GAIN AMPLIFIER, 30 - 400 MHz Harmonics vs. Frequency Supply Current vs. Temperature
0 280 -20 2nd Harmonic 3rd Harmonic 260 c) (dB -40 IC a) N 240 O M Id (m -60 AR H 220 -40C -80 +25C +85C -100 200 0 0.1 0.2 0.3 0.4 0.5 0.6 4.5 5 5.5 FREQUENCY (GHz) VOLTAGE (V)
Absolute Maximum Ratings Truth Table
12 rf input power 20 dbm attenUatiOn (db) b4[1] b3[1] b2 b1 b0 rf Output power 22 dbm 0 0 0 0 0 0 t digital inputs (b0-b4, latch enable) -0.5 to Vdd +0.5V 1 0 0 0 0 1 m 2 0 0 0 1 0 bias Voltage (Vdd) 5.6 V s 3 0 0 0 1 1 Channel temperature 125 °C 4 0 0 1 0 0 Continuous pdiss (t = 85 °C) 1.7 W l - (derate 42 mW/°C above 85 °C) 5 0 0 1 0 1 thermal resistance 6 0 0 1 1 0 24 °C/W (channel to ground paddle) 7 0 0 1 1 1 ita storage temperature -65 to +150 °C 8 0 1 0 0 0 ig Operating temperature -40 to +85 °C 9 0 1 0 0 1 10 0 1 0 1 0 11 0 1 0 1 1 eleCtrOstatiC sensitiVe deViCe s - d 12 0 1 1 0 0 ObserVe Handling preCaUtiOns r 13 0 1 1 0 1 14 0 1 1 1 0 ie
Amp Bias Voltage
15 0 1 1 1 1 16 1 X 0 0 0 lif Vdd rf (V) idd (typ.) (ma) 17 1 X 0 0 1 p 5V 244 18 1 X 0 1 0 m 19 1 X 0 1 1 20 1 X 1 0 0
Control Voltage Table
21 1 X 1 0 1 in a state Vdd = +3V Vdd = +5V 22 1 X 1 1 0 a low 0 to 0.5V @ <1 µa 0 to 0.8V @ <1 µa 23 1 X 1 1 1 High 2 to 3V @ <1 µa 2 to 5V @ <1 µa [1] enabling b4 disables b3, the minimum attenuation is 16 db le g
Control Interface:
b the gain of HmC680lp4(e) is control ed by adjusting the state of the attenuator. the attenuator has a 5-bit paral el ia CmOs/ttl compatible interface. state of the attenuator can be set with respect to the truth table above. r
Power on sequence:
a the ideal power up sequence is: gnd, Vdd, digital inputs, rf inputs. relative order of the digital inputs is not V important as long as they are powered after Vdd/gnd. Inf F or o m rat ip o r n ifc ur e n ,is hd e e d lbiv y e Anry alo a g n D d evi cto es ips la beclie ev eo d rtd o e b r e sa: ccH ur iattte itaen M d reliic a r bl o e w . H a o v weev eC r, o n r o For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other poration, 20 Alpha Road, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 rights of third parties that may result from its use. Specifications subject to change without notice. No Or P d hoe n r e O : 7 n- 81-li 3 n 2 e 9- a 4 t 7 0 www 0 • O . rdh e itt r o it n e li . n co e a m license is granted by implication or otherwise under any patent or patent rights of Analog Devices. t www.analog.com
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Application Support: Phon Trademarks and registered trademarks are the property of their respective owners. e: 978-250-334 A 3 p p liocra t ia o pp n S s u @ p h por ittti : Pte. ho c n o e m : 1-800-ANALOG-D
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