Datasheet AD8432 (Analog Devices) - 9

Data Sheet AD8432 100 1.00 ) 0.95 ) √Hz kΩ V/ ( 10 E (n 0.90 E IS O DANC E N P 0.85 E M G I UT LTA P 1 O 0.80 V UT T O PU IN 0.75 0.1 0.70 0.1 1 10 100
4
–50 –30 –10 10 30 50 70 90
7 03 03 1- 1-
FREQUENCY (MHz)
34
TEMPERATURE (°C)
34 08 08 Figure 15. Output Impedance vs. Frequency in Disable Mode Figure 18. Input Voltage Noise vs. Temperature
10 16 ) f = 1MHz √Hz G = 24.08dB V/ ) 14 E (n /√Hz IS V n 12 O ( E E N IS G = 21.58dB G 10 NO LTA 1 E G VO RS THERMAL 8 D LTA E NOISE ALONE O G = 18.06dB R R V E UT 6 F E P UT T-R O 4 PU G = 12.04dB IN 0.1 2 1 10 100 1k
36 38 0
–50 –30 –10 10 30 50 70 90
0 1- 1-
SOURCE RESISTANCE (Ω)
34
TEMPERATURE (°C)
34 08 08 Figure 16. Input-Referred Voltage Noise vs. Source Resistance (RS) Figure 19. Output Voltage Noise vs. Temperature
100 1.6 ) f = 1MHz √Hz V/ 1.4 n ) ISE ( √Hz 1.2 O V/ (n E N G G = 24.08dB 1.0 ISE O LTA G = 21.58dB 10 E N 0.8 VO G = 18.06dB G ED R LTA 0.6 ER G = 12.04dB VO T EF 0.4 -R PU T IN U G = 24.08dB P T 0.2 G = 21.58dB U G = 18.06dB O G = 12.04dB 1 0
1
1 10 100 1k
35
0.01 0.1 1 10 100
0 22 1- 1-
SOURCE RESISTANCE (Ω)
34
FREQUENCY (MHz)
34 08 08 Figure 17. Output-Referred Voltage Noise vs. Source Resistance (RS) Figure 20. Input Voltage Noise vs. Frequency Rev. D | Page 9 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION LOW NOISE AMPLIFIER (LNA) GAIN SETTING TECHNIQUE ACTIVE INPUT RESISTANCE MATCHING APPLICATIONS INFORMATION TYPICAL SETUP I/Q DEMODULATION FRONT END DIFFERENTIAL-TO-SINGLE-ENDED CONVERSION EVALUATION BOARD CONNECTION AND OPERATION Power Supply Input Termination Setting the Amplifier Gain Output SCHEMATIC OUTLINE DIMENSIONS ORDERING GUIDE NOTES NOTES NOTES