Datasheet AD8260 (Analog Devices) - 9

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Data Sheet AD8260 –20 0 f = 10MHz –30 HD2, VOUT = 1V p-p –20 Bc) HD3, VOUT = 1V p-p d –40 ( HD2, VOUT = 2V p-p N R HD3, V LOAD = 50Ω, VOUT = 1V p-p OUT = 2V p-p IO RLOAD = 50Ω, VOUT = 2V p-p T –50 –40 R RLOAD = 500Ω, VOUT = 1V p-p O Bc) R T d LOAD = 500Ω, VOUT = 2V p-p –60 IS D D3 ( IC IM –60 N –70 O RM –80 HA –80 –90 –100
09
–100
12
0 10 20 30 40 50 60 70 80 90 100
0 0 2-
2M 10M 100M
2-
LOAD CAPACITANCE (pF)
19 19 07
FREQUENCY (Hz)
07 Figure 9. Harmonic Distortion (HD2, HD3) vs. Load Capacitance at Two Figure 12. IMD3 vs. Frequency for Two Values of Output Voltage and Two Values of Output Voltage for the High Current Driver—See Figure 54 Values of Load Resistance for the High Current Driver—See Figure 55
0 50 f = 10MHz –20 40 Bc) d N ( –40 IO ) 30 RT m O B T d S –60 3 ( RLOAD = 50Ω, VOUT = 1V p-p C DI HD3 HD2 OIP 20 RLOAD = 50Ω, VOUT = 2V p-p NI RLOAD = 500Ω, VOUT = 1V p-p O –80 RLOAD = 500Ω, VOUT = 2V p-p HARM 10 –100 –120
0
0 0 0.5 1.0 1.5 2.0 2.5 3.0
-01 13
2M 10M 100M
02-
OUTPUT VOLTAGE (V p-p)
192 19 07
FREQUENCY (Hz)
07 Figure 10. Harmonic Distortion (HD2, HD3) vs. Output Voltage for the High Figure 13. Third-Order Intercept (OIP3) vs. Frequency for the High Current Driver Current Driver—See Figure 54 See Figure 55
–20 20 RLOAD = 50Ω –30 RLOAD = 500Ω c) B d –40 15 N ( IO HD2 –50 ) RT m O B T 2V p-p HD3 d S –60 ( B 10 1d C DI IP NI –70 O –80 5 HARM 1V p-p –90
14 0
–100
1 2- 1
0
0
1M 10M 100M
19 2-
1M 10M 100M
07
FREQUENCY (Hz)
19
FREQUENCY (Hz)
07 Figure 11. Harmonic Distortion (HD2, HD3) vs. Frequency of the High Current Figure 14. Input-Referred 1 dB Compression (IP1dB) vs. Frequency for Two Driver at Two Values of Output Voltage—See Figure 54 Values of Load Resistance for the High Current Driver Rev. B | Page 9 of 32 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION OVERVIEW HIGH CURRENT DRIVER AMPLIFIER PRECAUTIONS TO BE OBSERVED DURING HALF-DUPLEX OPERATION VMID BUFFER PREAMPLIFIER PREAMPLIFIER NOISE DGA GAIN CONTROL OUTPUT STAGE ATTENUATOR SINGLE-SUPPLY OPERATION AND AC COUPLING POWER-UP/POWER-DOWN SEQUENCE LOGIC INTERFACES APPLICATIONS INFORMATION EVALUATION BOARD CONNECTING THE EVALUATION BOARD OUTLINE DIMENSIONS ORDERING GUIDE