Datasheet 5L2503 (IDT) - 2

5L2503 Datasheet
Pin Assignments Figure 1. Pin Assignments for 2.5 × 2.5 mm 12-DFN – Top View
SDA_DFC0/OE2 1 12 VSS SEL_DFC/SCL_DFC1/OE3 2 11 OUT3 VSS 3 10 VDDO XOUT 4 9 OUT2 XIN 5 8 OE1 VDD1_8 6 7 OUT1
2.5 × 2.5 mm 12-DFN Pin Descriptions Table 1. Pin Descriptions Number Name Type Description
I2C data pin; can be DFC0 function by OTP programming or selected by 1 SDA_DFC0/OE2 I/O SEL_DFC at power-on default. Output enable pin for OUT2. SEL_DFC/SCL_DFC1/ I2C clock pin; can be DFC1 function by OTP programming selected by 2 Input OE3 SEL_DFC at power-on default. Output enable pin for OUT3. 3 VSS Power Ground pin. 4 XOUT I/O Crystal oscil ator interface output. 5 XIN Input Crystal oscillator interface input or clock input pin (CLKIN). 6 VDD1_8 Power 1.8V power rail. 7 OUT1 Output 1.8V LVCMOS clock output. 8 OE1 Input Output enable control 1. 9 OUT2 Output 1.8V LVCMOS clock output. 10 VDDO Power 1.8V output clock power supply pin; supports OUT2/3. 11 OUT3 Output 1.8V LVCMOS clock output. 12 VSS Power Ground pin. EPAD Power Connect to ground pad. ©2017 Integrated Device Technology, Inc. 2 October 24, 2017 Document Outline Description Typical Applications Features Output Features Key Specifications Block Diagram Pin Assignments Figure 1. Pin Assignments for 2.5 × 2.5 mm 12-DFN – Top View Pin Descriptions Table 1. Pin Descriptions Power Group Table 2. Power Group Output Source Selection Register Settings Table 3. OUT3 Source Table 4. OUT2 Source Table 5. OUT1 Source Table 6. DIV1 Source Device Features and Functions DFC – Dynamic Frequency Control Figure 2. DFC Function Block Diagram Table 7. DFC Function Priority DFC Function Programming PPS – Proactive Power Saving Function Figure 3. PPS Function Block Diagram Figure 4. PPS Assertion/Deassertion Timing Chart PPS Function Programming Input Pin Function Table 8. OE1 Pin Function Table 9. SDA/SCL Function Spread Spectrum ORT – VCO Overshoot Reduction Technology PLL Features and Descriptions Table 10. Output Divider 1 Table 11. Output Dividers 2, 3, and 5 Table 12. Output Divider 4 Output Clock Test Conditions Absolute Maximum Ratings Table 13: Absolute Maximum Ratings Recommended Operating Conditions Table 14: Recommended Operating Conditions Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down Resistance (TA = +25 °C) Table 15: Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down Resistance Recommended Crystal Characteristics Table 16: Crystal Characteristics DC Electrical Characteristics Table 17: DC Electrical Characteristics DC Electrical Characteristics for 1.8V LVCMOS Table 18: DC Electrical Characteristics for 1.8V LVCMOS AC Electrical Characteristics Table 19. AC Electrical Characteristics I2C Bus Characteristics Table 20. I2C Bus DC Characteristics Table 21. I2C Bus AC Characteristics Spread Spectrum Generation Specifications Table 22: Spread Spectrum Generation Specifications General I2C Serial Interface Information Package Drawings Figure 5. NVG12, 2.5 × 2.5 mm 12-DFN Package Drawing – Page 1 Figure 6. NVG12, 2.5 × 2.5 mm 12-DFN Package Drawing – Page 2 Marking Diagram Ordering Information Revision History