=========================================== Features Low power CMOS technology (ideal for battery operated PIR devices) CMOS high input impedance operational amplifiers Bi-directional level detector / Excellent noise immunity Built-in Power up disable & output pulse control logic Dual mode : retriggerable & non-retriggerable Pin description Pin Number SymbolDescription1A Retriggerable & non-retriggerable mode select (A=1 : re-triggerable) 2VO Detector output pin (active high) 3RR1 Output pulse width control (Tx) * See definition below 4RC1 Output pulse width control (Tx) * 5RC2 Trigger inhibit control (Ti) * 6RR2 Trigger inhibit control (Ti) * 7Vss Ground 8VRF RESET & voltage reference input (Normally high. Low=reset) 9VC Trigger disable input (VC >0.2Vdd=enable; Vc<0.2Vdd =disabled) 10IB Op-amp input bias current setting 11Vdd Supply voltage 122OUT 2nd stage Op-amp output 132IN - 2nd stage Op-amp inverting input 141IN + 1 st stage Op-amp non-inverting input 151IN - 1 st stage Op-amp inverting input 161OUT 1 st stage Op-amp output * Tx = The time duration during which the output pin (Vo) remains high after triggering. Ti = During this time period, triggering is inhibited. See timing charts for details. Tx ≈ 24576 xR10 x C6； Ti ≈ 24 x R9 x C7。 (ref to schematic) Document Outline High Performance PIR Motion Detector IC Symbol A Retrigerrable waveform(NOTE : VH=0.7Vdd, VL=0.3Vdd) Non-retriggerable waveform(NOTE : VH=0.7Vdd, VL=0.3Vdd)
