Datasheet PI4ULS5V202Q (Diodes) - 6

PI4ULS5V202Q Timing Characteristics – Open Drain Driving Configuration
(I/O test circuits of Figures 4, 5 and 7, CLOAD = 15 pF, driver output impedance ≤ 50Ω, RLOAD = 1 MΩ, unless otherwise specified)
Symbol Parameter Test Conditions Min Typ Max Unit 1.2 ≤ VCCA ≤ VCCB ≤ 5.5V
tRB B port Rise Time - - - 450 nS tFB B port Fall Time - - - 30 nS tRA A port Rise Time - - - 450 nS tFA A port Fall Time - - - 30 nS tPHL−A−B Propagation Delay - - - 300 nS (Driving A) tPLH−A−B - - - 300 nS tPHL−B−A Propagation Delay - - - 300 nS (Driving B) tPLH−B−A - - - 300 nS tPPSKEW Part−to−Part Skew - - - 50 nS MDR Maximum Data Rate - 2 - - Mbps
Test Circuits
PI4ULS5V202Q
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July 2019 Document Number DS41479 Rev 2-2 6 © Diodes Incorporated