MAX22700D–MAX22702D Ultra-High CMTI MAX22700E–MAX22702E Isolated Gate Drivers Test Circuits and Timing Diagrams VDDA V V DDA VDDB DDB MAX2270_E IN VDDA IN OUT1 TEST OUT IN 50% 50% SOURCE EN CL 200pF GNDA tPLH tPHL GNDA VSSB VDDB OUT1 V 2V 2V SSB tPM tPM VDDA VDDB VDDB OUT2 80% MAX2270_E IN 20% OUT2 V 2V 2V SSB OUT CL EN 200pF tR tF GNDA VSSB (A) (B) Figure 3. Test Circuit (A) and Timing Diagram (B) VDDA INPUT SOURCE GNDA VDDA V V DDA V DDB DDB VDDB MAX22701E 50Ω TEST IN CLAMP SOURCE INPUT CL TEST VSSB SOURCE EN 200pF SOURCE GNDA VDDB VSSB CLAMP VTH_CLMP = 2V VSSB tON = 20ns (A) (B) Figure 4. MAX22701 Miller Clamp Test Circuit (A) and Timing Diagram (B) www.maximintegrated.com Maxim Integrated │
