Datasheet SFH6700, SFH6701, SFH6702, SFH6705, SFH6711, SFH6712, SFH6719 (Vishay) - 5

End of Life July-2017 SFH6700, SFH6701, SFH6702, SFH6705, SFH6711, SFH6712, SFH6719
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SWITCHING CHARACTERISTICS PARAMETER TEST CONDITION PART SYMBOL MIN. TYP. MAX. UNIT
Output disable time from logic low (SFH6700, SFH6719) (1) tPLZ 50 ns Output rise time (1) 10 % to 90 % tr 40 ns Output fall time (1) 90 % to 10 % tf 10 ns Without peaking capacitor SFH6705 tPHL 115 ns Propagation delay time to logic With peaking capacitor SFH6705 tPHL 105 300 ns low output level (3) Without peaking capacitor SFH6705 tPLH 125 ns With peaking capacitor SFH6705 tPLH 90 300 ns 10 % to 90 % tr 25 ns Output rise time (3) 90 % to 10 % tr 4 ns
Notes
• 0 °C ≤ Tamb ≤ 85 °C; 4.5 V ≤ VCC ≤ 15 V; 1.6 mA ≤ IFon ≤ 5 mA; 2 ≤ VEH ≤ 15 V (SFH6700/19); 0 ≤ VEL ≤ 0.8 V (SFH6700, SFH6719); 0 mA ≤ IFoff ≤ 0.1 mA (1) Typical values: Tamb = 25 °C; VCC = 5 V; IFon = 3 mA unless otherwise specified (4) (2) Typical values: Tamb = 25 °C, VCC = 5 V; IFon = 3 mA; RL = 390 Ω unless otherwise specified (4) (3) A 0.1 μF bypass capacitor connected between pins 5 and 8 must be used
COMMON MODE TRANSIENT IMMUNITY PARAMETER TEST CONDITION PART SYMBOL MIN. TYP. MAX. UNIT
SFH6700 |CMH| (1) 1000 V/μs SFH6701 |CMH| (1) 1000 V/μs |VCM| = 50 V, IF = 1.6 mA SFH6702 |CMH| (1) 1000 V/μs Logic high common mode SFH6705 |CM transient immunity H| (1) 1000 V/μs SFH6711 |CMH| (1) 2500 V/μs |VCM| = 400 V, IF = 1.6 mA SFH6712 |CMH| (1) 2500 V/μs SFH6719 |CMH| (1) 2500 V/μs |VCM| = 50 V, IF = 0 mA SFH6700 |CML| (2) 1000 V/μs SFH6701 |CML| (2) 1000 V/μs |VCM| = 50 V, IF = 0 mA SFH6702 |CML| (2) 1000 V/μs Logic Low common mode SFH6705 |CM transient immunity L| (2) 1000 V/μs SFH6711 |CML| (2) 2500 V/μs |VCM| = 400 V, IF = 0 mA SFH6712 |CML| (2) 2500 V/μs SFH6719 |CML| (2) 2500 V/μs
Notes
• Tamb = 25 °C, VCC = 5 V (1) CMH is the maximum slew rate of a common mode voltage VCM at which the output voltage remains at logic high level (VO > 2 V) (2) CML is the maximum slew rate of a common mode voltage VCM at which the output voltage remains at logic high level (VO < 0.8 V) Rev. 1.7, 07-Feb-17
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