ST7LITEUSxPIN DESCRIPTION (Cont’d) Figure 4. 16-pin package pinout (For development or tool prototyping purposes only. Package not orderable in production quantities.) Reserved 1) 1 16 NC VDD 2 15 VSS RESET 3 ei0 14 PA0 (HS) / AIN0 / ATPWM ICCCLK 4 ei1 13 PA1 (HS) / AIN1 PA5 (HS) / AIN4 / CLKIN 5 ei4 12 NC 6 ei3 PA4 (HS) / AIN3 11 ICCDATA PA3 7 ei2 10 PA2 (HS) / LTIC / AIN2 NC 8 9 NC Note 1 : must be tied to ground Notes: The differences versus the 8-pin packages are list- 3. PA3 pin is always configured as output. Any ed below: change on multiplexed IO reset control registers 1. The ICC signals (ICCCLK and ICCDATA) are (MUXCR1 and MUXCR2) will have no effect on mapped on dedicated pins. PA3 functionality. Refer to “REGISTER DESCRIP- TION” on page 24. 2. The RESET signal is mapped on a dedicated pin. It is not multiplexed with PA3. 6/108 1
