ST7LITEUSxRegisterAddressBlockRegister NameReset StatusRemarksLabel 0047h MuxIO- MUXCR0 Mux IO-Reset Control Register 0 00h R/W 0048h reset MUXCR1 Mux IO-Reset Control Register 1 00h R/W 0049h AWUPR AWU Prescaler Register FFh R/W AWU 004Ah AWUCSR AWU Control/Status Register 00h R/W 004Bh DMCR DM Control Register 00h R/W 004Ch DMSR DM Status Register 00h R/W 004Dh DMBK1H DM Breakpoint Register 1 High 00h R/W DM 3) 004Eh DMBK1L DM Breakpoint Register 1 Low 00h R/W 004Fh DMBK2H DM Breakpoint Register 2 High 00h R/W 0050h DMBK2L DM Breakpoint Register 2 Low 00h R/W 0051h to Reserved area (47 bytes) 007Fh Legend: x=undefined, R/W=read/write Notes : 1. The contents of the I/O port DR registers are readable only in output configuration. In input configura- tion, the values of the I/O pins are returned instead of the DR register contents. 2. The bits associated with unavailable pins must always keep their reset value. 3. For a description of the DM registers, see the ST7 ICC Protocol Reference Manual. 10/108 1
