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Datasheet SSM2603 (Analog Devices) - 7

ПроизводительAnalog Devices
ОписаниеLow Power Audio Codec
Страниц / Страница31 / 7 — Data Sheet. SSM2603. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table …
ВерсияD
Формат / Размер файлаPDF / 509 Кб
Язык документаанглийский

Data Sheet. SSM2603. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table 7. Parameter. Rating. Table 8. Thermal Resistance

Data Sheet SSM2603 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 7 Parameter Rating Table 8 Thermal Resistance

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Текстовая версия документа

Data Sheet SSM2603 ABSOLUTE MAXIMUM RATINGS
At 25°C, unless otherwise noted.
THERMAL RESISTANCE Table 7.
θJA is specified for the worst-case conditions, that is, a device
Parameter Rating
soldered in a circuit board for surface-mount packages. Supply Voltage 5 V
Table 8. Thermal Resistance
Input Voltage VDD
Package Type θJA θJC-TOP θJC-BOTTOM Unit
Common-Mode Input Voltage VDD 28-Lead, 5 mm × 5 mm LFCSP 52.7 31.4 1.52 °C/W Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +85°C
ESD CAUTION
Junction Temperature Range −65°C to +165°C Lead Temperature (Soldering, 60 sec) 300°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. D | Page 7 of 31 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Digital Filter Characteristics Timing Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Converter Filter Response Digital De-Emphasis Theory of Operation Digital Core Clock ADC and DAC ADC High-Pass and DAC De-Emphasis Filters Hardware Mute Pin Automatic Level Control (ALC) Decay (Gain Ramp-Up) Time Attack (Gain Ramp-Down) Time Noise Gate Analog Interface Signal Chain Stereo Line and Monaural Microphone Inputs Bypass and Sidetone Paths to Output Line and Headphone Outputs Digital Audio Interface Recording Mode Playback Mode Digital Audio Data Sampling Rate Software Control Interface Control Register Sequencing Typical Application Circuits Register Map Register Map Details Left-Channel ADC Input Volume, Address 0x00 Right-Channel ADC Input Volume, Address 0x01 Left-Channel DAC Volume, Address 0x02 Right-Channel DAC Volume, Address 0x03 Analog Audio Path, Address 0x04 Digital Audio Path, Address 0x05 Power Management, Address 0x06 Power Consumption Digital Audio I/F, Address 0x07 Sampling Rate, Address 0x08 Active, Address 0x09 Software Reset, Address 0x0F ALC Control 1, Address 0x10 ALC Control 2, Address 0x11 Noise Gate, Address 0x12 Outline Dimensions Ordering Guide
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