link to page 5 link to page 13 link to page 13 link to page 13 link to page 13 LT3922-1 PIN FUNCTIONS SW: Switch Pins. These pins are internally connected to ISP and ISN (and therefore, the regulated current supplied the power devices and drivers. They should always be to the load). Alternatively, a digital pulse at this pin with tied together. In normal operation, the voltage of these duty cycle from 12.5% to 62.5% can be used to program pins will switch between the output voltage and zero at the regulated voltage. Below 200mV or 10% duty cycle, the programmed frequency. Do not force any voltage on the CTRL pin voltage disables switching. For more detail, these pins. see Typical Performance Characteristics and Applications BST: Boost Pin. This pin supplies the top power switch Information sections. GATE driver. Connect a 100nF capacitor between this ISP: Positive Current Sense Pin. This pin is one of the inputs pin and SW close to the package. An internal diode from to the internal current sense error amplifier. It should be INTVCC to BST will charge the capacitor when the SW pin connected to the positive side of the external sense resis- switches low. tor. Use Kelvin connection for accurate current sensing. INTVCC: Internally Regulated, Low-Voltage Supply Pin. ISN: Negative Current Sense Pin. This pin is one of the This pin provides the power for the converter switch GATE inputs to the internal current sense error amplifier. It drivers. Do not force any voltage on this pin. Place a 2.2µF should be connected to the negative side of the external bypass capacitor to GND close to the package. sense resistor. Use Kelvin connection for accurate cur- V rent sensing. IN: Input Voltage Pin. This pin supplies power to the internal, high-performance analog circuitry. Connect a VC: Compensation Pin. A resistor and capacitor connected bypass capacitor between this pin and GND. in series from this pin to GND stabilize the current and EN/UVLO: Enable and Undervoltage Lockout Pin. A volt- voltage regulation. Typical resistor and capacitor values age at this pin greater than 1.33V will enable switching, are from 0k to 100k and from 0.1nF to 10nF, respectively. and a voltage less than 0.1V is guaranteed to shut down FB: Feedback Pin. When the voltage at this pin is near 1.2V the internal current bias and sub-regulators. A resistor the regulated current is automatically reduced from the network between this pin and ground can be used to set programmed value. A resistor network between this pin the pin voltage and automatically lockout the part when and VOUT can be used to set a limit for the output voltage. VIN is below a certain level. No internal components pull up If the voltage at the FB pin reaches 1.266V, a FB overvolt- or down on this pin, so it requires an external voltage bias age lockout comparator disables switching. for normal operation. This pin may be tied directly to VIN. SS: Soft-Start Pin. At startup and recovery from fault OVLO: Input Overvoltage Lockout Pin. When the voltage at conditions, a 20μA current charges the capacitor and the this pin rises above 1.205V, the system disables switch- FB voltage tracks the rising voltage at this pin until the load ing and resets the soft-start capacitor. Do not leave this current reaches its programmed level. Typical values for pin open. Tie this pin to GND when the OVLO function is the capacitor are 10nF to 100nF. Using a single resistor not used. from SS to INTVCC, the LT3922-1 can be set in two dif- V ferent fault modes for the shorted LED conditions: hiccup REF: Reference Voltage Pin. This pin provides a buffered 2V reference capable of 3mA drive. It can be used to supply (no resistor) and latchoff (100k). Refer to the Applications resistor networks for setting the voltages at the CTRL and Information section for a detailed explanation. PWM pins. Bypass with a 1μF capacitor to GND. ISMON: Output Current Monitoring Pin. This pin provides CTRL: Control Pin. An analog voltage from 250mV to a buffered voltage output equal to 10mV for every 1mV 1.25V at this pin programs the regulated voltage between between ISP and ISN. Rev 0 10 For more information www.analog.com Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATIONS PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS
