LTC3129-1 pin FuncTions (QFN/MSOP) PGND (Pin 15/Pin 13, Exposed Pad Pin 17/Pin 17): Power Table 1. VOUT Program Settings Ground. Provide a short direct PCB path between PGND VS3 PINVS2 PINVS1 PINV and the ground plane. The exposed pad must also beOUT 0 0 0 2.5V soldered to the PCB ground plane . It serves as a power 0 0 V ground connection, and as a means of conducting heat CC 3.3V 0 V away from the die. CC 0 4.1V 0 VCC VCC 5V SW1 (Pin 16/Pin 14): Switch Pin. Connect to one side of VCC 0 0 6.9V the inductor. Keep PCB trace lengths as short and wide VCC 0 VCC 8.2V as possible to reduce EMI. VCC VCC 0 12V VCC VCC VCC 15V block DiagraM V BST1 SW1 SW2 BST2 IN VIN VCC VREF LDO VCC_GD START VOUT V DRIVER OUT A V VCC 4.1V CC VCC ISENSE D DRIVER B START V 1.175V DRIVER REF VREF ISENSE VREF_GD C DRIVER VS1 RUN + V VS2 OUT START SELECT 0.9V – DRV_B DRV_C INPUTS DRV_A DRV_D VS3 + SD I 1.22V – SENSE + UV – V 500mA IN – ILIM + 1.1V 1.175V LOGIC – ENABLE ISENSE UVLO + – FB V I C SENSE – IZERO – + 20mA + PWM + 1.175V THERMAL + SHUTDOWN – RESET SOFT-START OSC MPPC + 1.175V – PWM – PGOOD 600mV + – 5M – SLEEP CLAMP SLEEP –7.5% + 100mV + GND PGND 31291 BD 31291fc 10 For more information www.linear.com/LTC3129-1
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