Datasheet IRLR024NPbF, IRLU024NPbF (Infineon) - 7

IRLR/U024NPbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations • Low Stray Inductance ƒ • Ground Plane • Low Leakage Inductance Current Transformer - + ‚ „ - + -  RG • dv/dt controlled by R + G • Driver same type as D.U.T. - VDD • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test Driver Gate Drive P.W. Period D = P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Body Diode Forward Current Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Body Diode Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices
Fig 14.
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