Datasheet SZ8463ML, SZ8463RL, SZ8463FML, SZ8463FML (Microchip) - 213

ПроизводительMicrochip
ОписаниеIEEE 1588 Precision Time Protocol-Enabled, Three-Port, 10/100 Managed Switch with MII or RMII
Страниц / Страница213 / 213 — Worldwide Sales and Service. AMERICAS. ASIA/PACIFIC. EUROPE. Corporate …
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Язык документаанглийский

Worldwide Sales and Service. AMERICAS. ASIA/PACIFIC. EUROPE. Corporate Office. Australia - Sydney. India - Bangalore. Austria - Wels

Worldwide Sales and Service AMERICAS ASIA/PACIFIC EUROPE Corporate Office Australia - Sydney India - Bangalore Austria - Wels

25 предложений от 17 поставщиков
IEEE 1588 3-port 10/100 Switch w/Generic host I/F & Fibre support 64 LQFP 10x10x1.4mm TRAY
Триема
Россия
KSZ8463FMLI
252 ₽
T-electron
Россия и страны СНГ
KSZ8463RLI
Microchip
326 ₽
KSZ8463FMLI
Microchip
514 ₽
Кремний
Россия и страны СНГ
KSZ8463RL/FRL
Micrel
по запросу

Модельный ряд для этого даташита

Текстовая версия документа

Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office Australia - Sydney India - Bangalore Austria - Wels
2355 West Chandler Blvd. Tel: 61-2-9868-6733 Tel: 91-80-3090-4444 Tel: 43-7242-2244-39 Chandler, AZ 85224-6199 Fax: 43-7242-2244-393
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Tel: 358-9-4520-820 Web Address: Tel: 86-23-8980-9588 Tel: 81-6-6152-7160 www.microchip.com
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Dallas
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Tel: 86-186-6233-1526 Tel: 886-2-2508-8600 Tel: 39-0331-742611 Novi, MI Fax: 39-0331-466781 Tel: 248-848-4000
China - Wuhan Thailand - Bangkok
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Raleigh, NC
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Tel: 46-31-704-60-40 Tel: 631-435-6000
Sweden - Stockholm San Jose, CA
Tel: 46-8-5090-4654 Tel: 408-735-9110 Tel: 408-436-4270
UK - Wokingham
Tel: 44-118-921-5800
Canada - Toronto
Fax: 44-118-921-5820 Tel: 905-695-1980 Fax: 905-695-2078 DS00002642A-page 213  2018 Microchip Technology Inc. 10/25/17 Document Outline 1.0 Introduction 1.1 General Terms and Conditions 1.2 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Physical (PHY) Block 3.2 Media Access Controller (MAC) Block 3.3 Switch Block 3.4 IEEE 1588 Precision Time Protocol (PTP) Block 3.5 General Purpose and IEEE 1588 Input/Output (GPIO) 3.6 Using the GPIO Pins with the Trigger Output Units 3.7 Using the GPIO Pins with the Time Stamp Input Units 3.8 Device Clocks 3.9 Power 3.10 Power Management 3.11 Interrupt Generation on Power Management-Related Events 3.12 Interfaces 4.0 Register Descriptions 4.1 Register Map of CPU Accessible I/O Registers 4.2 Register Bit Definitions 4.3 MII Management (MIIM) Registers 4.4 Management Information Base (MIB) Counters 4.5 Static MAC Address Table 4.6 Dynamic MAC Address Table 4.7 VLAN Table 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings** 6.0 Electrical Characteristics 7.0 Timing Specifications 7.1 MII Transmit Timing in MAC Mode 7.2 MII Receive Timing in MAC Mode 7.3 MII Receive Timing in PHY Mode 7.4 MII Transmit Timing in PHY Mode 7.5 Reduced MII (RMII) Timing 7.6 MIIM (MDC/MDIO) Timing 7.7 SPI Input and Output Timing 7.8 Auto-Negotiation Timing 7.9 Trigger Output Unit and Time Stamp Input Unit Timing 7.10 Reset and Power Sequence Timing 7.11 Reset Circuit 8.0 Reference Clock: Connection and Selection 9.0 Selection of Isolation Transformers 10.0 Package Outline Appendix A: Data Sheet Revision History The Microchip Web Site Customer Change Notification Service Customer Support Product Identification System Worldwide Sales and Service
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