Datasheet KSZ8893FQL (Microchip) - 5

KSZ8893FQL 2.0 PIN DESCRIPTION AND CONFIGURATION FIGURE 2-1: 128-PIN PQFP ASSIGNMENT, (TOP VIEW)
REFCLK 0 1 N 0 D N D1 DV D0 D1 D3 N O D XC D XER _ 1 S_ A L N RXD0 RX RXD2 RXD3 RX R N TXC / T TX TX TXD2 TX TXE DSEL T NUSED PIQ NUSED NUSED DDC M M DDIO M M NUSED U PS0 PS SPI SD SC S MDI MDC U U V DG SCONF SCONF SCRS SCOL SM S SM SM S SM V DG S S SM SM SM SM SM LE UNUSE U RS X2 X1 99 98 97 96 95 94 93 92 91 102 101 100 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 UNUSED 103 64 AGND UNUSED 104 63 VDDAP UNUSED 105 62 AGND 106 61 ISET DGND 107 60 TEST2 VDDIO 108 59 TEST1 UNUSED 109 58 AGND UNUSED 110 57 VDDA UNUSED 111 56 TXP2 UNUSED 112 55 TXM2 UNUSED 113 54 AGND UNUSED 114 53 RXP2 UNUSED 115 52 RXM2 UNUSED 116 51 VDDARX UNUSED 117 50 VDDATX UNUSED 118 49 TXM1 UNUSED UNUSED 119 48 TXP1 UNUSED 120 47 AGND UNUSED 121 46 RXM1 DGND 122 45 RXP1 VDDC 123 44 FXSD1 UNUSED 124 43 VDDA UNUSED 125 42 AGND UNUSED 126 41 MUX2 TESTEN 127 40 MUX1 SCANEN 128 39 AGND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 1 C C T N S X C D F BM EL1 NC E LE DDIO SPD DPX DPX II_ IXDI L_EN 2LED1 DGND LP V MCHS MCCs PDD# ANEN ADV P2 P2 P2FF P1FS DGND VDDC D P1SPD DIAGF AGND VDDA P1FF P1LED2 P1 P1LED0 P2LED2 P P2LED0 P1 M P1LED3 PWRDN P2 P1CRCD P2LED3 P2MDI P1 LEDS RM P1ANEN HWPOVR P2M  2019 Microchip Technology Inc. DS00003038B-page 5 Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Media Conversion 3.2 Physical Layer Transceiver 3.3 MAC and Switch 3.4 Advanced Switch Functions 3.5 Unicast MAC Address Filtering 3.6 Configuration Interface 3.7 Loopback Support 4.0 Register Descriptions 4.1 MII Management (MIIM) Registers 4.2 Register Descriptions 4.3 Register Map: Switch, PHY, TS-1000 Media Converter (8-bit registers) 4.4 Register Descriptions 4.5 Advanced Control Registers (Registers 96-141) 4.6 Static MAC Address Table 4.7 VLAN Table 4.8 Dynamic MAC Address Table 4.9 Management Information Base (MIB) Counters 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings** 6.0 Electrical Characteristics 7.0 Timing Specifications 7.1 EEPROM Timing 7.2 SNI Timing 7.3 MII Timing 7.4 RMII Timing 7.5 SPI Timing 7.6 Auto-Negotiation Timing 7.7 Reset Timing 8.0 Reset Circuit 9.0 Selection of Isolation Transformers 10.0 Package Outline 10.1 Package Marking Information Appendix A: Data Sheet Revision History The Microchip Web Site Customer Change Notification Service Customer Support Product Identification System Worldwide Sales and Service