Datasheet KSZ8895MQX, KSZ8895RQX KSZ8895FQX, KSZ8895MLX (Microchip) - 7

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KSZ8895MQX/RQX/FQX/MLX FIGURE 2-2: 128-LQFP PIN ASSIGNMENT (TOP VIEW)
LED3-2 LED4-0 LED4-1 LED4-2 LED5-0 LED5-1 LED5-2 VDDC GNDD SCONF0 SCONF1 SCRS SCOL SMRXD0 SMRXD1 SMRXD2 SMRXD3 SMRXDV SMRXC VDDIO GNDD SMTXC SMTXER SMTXD0 SMTXD1 SMTXD2 SMTXD3 SMTXEN PCOL PCRS PMRXER PMRXD0 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 LED3-1 97 98 64 PMRXD1 LED3-0 99 63 PMRXD2 GNDD 100 62 PMRXD3 VDDIO 101 61 PMRXDV LED2-2 102 60 PMRXC LED2-1 103 59 VDDIO LED2-0 58 GNDD LED1-2 104 105 57 PMTXC LED1-1 106 56 PMTXER LED1-0 107 55 PMTXD0 MDC 108 MDIO 109 SPIQ 110 SPIC/SCL 111 SPID/SDA
KSZ8895MLX
54 PMTXD1 53 PMTXD2 52 PMTXD3 51 PMTXEN 112 50 VDDC SPIS_N 113 PS1 114 PS0 RST_N 115 49 GNDD 48 INTR_N 47 PWRDN_N 116 46 NC GNDD 117 45 NC VDDC 118 TESTEN 119
(Top View)
44 NC 43 NC SCANEN 120 42 NC NC 121 41 NC X1 122 40 NC X2 123 39 NC NC 124 NC 38 NC LDO_O 125 37 VDDAT 126 TXM5 IN_PWR_SEL 36 127 TXP5 35 GNDA TEST2 128 34 GNDA 33 RXM5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 T T T RXP1 TXP1 TXM1 TXP2 ISET GNDA RXM1 GNDA RXP2 RXM2 GNDA TXM2 GNDA RXP3 RXM3 TXP3 RXP4 RXM4 TXM4 GNDA TXM3 GNDA TXP4 GNDA RXP5 VDDAR VDDA VDDAR VDDA VDDA VDDAR MDIXDIS
TABLE 2-1: SIGNALS - KSZ8895MQX/RQX/FQX/MLX Type, Pin Pin Note Port Pin Function, Note 2-2 Number Name 2-1
Disable auto MDI/MDI-X. 1 MDI-XDIS IPD 1 - 5 PD (default) = normal operation. PU = disable auto MDI/MDI-X on all ports. 2 GNDA GND — Analog ground.  2016 - 2019 Microchip Technology Inc. DS00002246B-page 7 Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Physical Layer Transceiver 3.2 Power 3.3 Power Management 3.4 Switch Core 3.5 Advanced Functionality 3.6 MII Management (MIIM) Interface 3.7 Serial Management Interface (SMI) 4.0 Register Descriptions 4.1 Global Registers 4.2 Port Registers 4.3 Advanced Control Registers 4.4 Static MAC Address Table 4.5 VLAN Table 4.6 Dynamic MAC Address Table 4.7 Management Information Base (MIB) Counters 4.8 MIIM Registers 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings*** 6.0 Electrical Characteristics 7.0 Timing Diagrams 7.1 EEPROM Timing 7.2 SNI Timing 7.3 MII Timing 7.4 RMII Timing 7.5 SPI Timing 7.6 Auto-Negotiation Timing 7.7 MDC/MDIO Timing 7.8 Reset Timing 8.0 Reset Circuit 9.0 Selection of Isolation Transformer, (Note 9-1) 10.0 Package Outline Appendix A: Data Sheet Revision History The Microchip Website Customer Change Notification Service Customer Support Product Identification System Worldwide Sales and Service