link to page 30 link to page 9 link to page 23 link to page 41 link to page 6 link to page 6 link to page 5 link to page 5 link to page 5 link to page 5 AD5590ParameterMinTypMaxUnitTest Conditions/Comments2 LOGIC INPUTS Input High Voltage, VINH 0.7 × VDRIVE V Input Low Voltage, VINL 0.3 × VDRIVE V Input Current, IIN −1 +1 µA Typically 10 nA Input Capacitance, C 1, 4 IN 10 pF LOGIC OUTPUTS Output High Voltage, VOH VDRIVE − 0.2 V ISOURCE = 200 µA; VDD = 2.7 V to 5.25 V Output Low Voltage, VOL 0.4 V ISINK = 200 µA Floating State Leakage Current ±10 µA weak/TRI bit set to 0 Floating State Output Capacitance4 10 pF weak/TRI bit set to 0 Output Coding Straight (Natural) Binary coding bit set to 1 Twos Complement coding bit set to 0 CONVERSION RATE4 Conversion Time 800 ns 16 ASCLK cycles, ASCLK = 20 MHz Track-and-Hold Acquisition Time3 300 ns Sine wave input 300 ns Full-scale step input Throughput Rate 1 MSPS @ 5 V (see the Serial Interface section) POWER REQUIREMENTS ADCVDD 2.7 5.25 V VDRIVE 2.7 5.25 V IDRIVE 0.15 µA I 5 DD Digital inputs = 0 V or VDRIVE Normal Mode, Static 750 µA VDD = 4.75 V to 5.25 V, ASCLK on or off Normal Mode, Operational 2.5 mA VDD = 4.75 V to 5.25 V, fSCLK = 20 MHz (fS = Maximum Throughput) Autostandby Mode 1.55 mA fSAMPLE = 500 kSPS 100 µA Static Autoshutdown Mode 960 µA fSAMPLE = 250 kSPS 0.5 µA Static Full Shutdown Mode 0.02 0.5 µA ASCLK on or off Power Dissipation Normal Mode, Operational 12.5 mW ADCVDD = 5 V, fSCLK = 20 MHz Autostandby Mode, Static 500 µW ADCVDD = 5 V Autoshutdown Mode, Static 2.5 µW ADCVDD = 5 V Full Shutdown Mode 2.5 µW ADCVDD = 5 V 1 Specifications apply for fSCLK up to 20 MHz. For serial interfacing requirements, see the Timing Specifications section. 2 Temperature range: −40°C to +85°C. 3 See the Terminology section. 4 Guaranteed by design and characterization. Not production tested. 5 See the ADC Power vs. Throughput Rate section. Rev. A | Page 5 of 44 Document Outline Features Applications Functional Block Diagram Revision History General Description Specifications ADC Specifications DAC Specifications DAC AC Characteristics Operational Amplifier Specifications Timing Specifications ADC Timing Characteristics DAC Timing Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics DAC ADC Amplifier Terminology Theory of Operation DAC Section Resistor String DAC Internal Reference DAC Output Amplifier ADC Section ADC Converter Operation Analog Input ADC Transfer Function Analog Input Selection Digital Inputs VDRIVE Reference Section Amplifier Section Serial Interface Accessing the DAC Block DAC Input Shift Register Interrupt DAC Internal Reference Register DAC Power-On Reset DAC Power-Down Modes DAC Clear Code Register LDAC Function Accessing the ADC Block ADC Modes of Operation Normal Mode (PM1 = PM0 = 1) Full Shutdown (PM1 = 1, PM0 = 0) AutoShutdown (PM1 = 0, PM0 = 1) Autostandby (PM1 = PM0 = 0) Powering Up the ADC Interfacing to the ADC ADC Control Register ADC Sequencer Operation ADC Shadow Register ADC Power vs. Throughput Rate Outline Dimensions Ordering Guide
