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Datasheet LTM4686, LTM4686-1 (Analog Devices) - 80

ПроизводительAnalog Devices
ОписаниеUltrathin Dual 10A or Single 20A μModule Regulator with Digital Power System Management
Страниц / Страница132 / 80 — APPENDIX B. Figure 37. PMBus Packet Protocol Diagram Element Key. Figure …
ВерсияB
Формат / Размер файлаPDF / 3.3 Мб
Язык документаанглийский

APPENDIX B. Figure 37. PMBus Packet Protocol Diagram Element Key. Figure 38. Quick Command Protocol

APPENDIX B Figure 37 PMBus Packet Protocol Diagram Element Key Figure 38 Quick Command Protocol

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LTM4686/LTM4686-1
APPENDIX B
1 7 1 1 8 1 1 S SLAVE ADDRESS Wr A DATA BYTE A P x x S START CONDITION Sr REPEATED START CONDITION Rd READ (BIT VALUE OF 1) Wr WRITE (BIT VALUE OF 0) x SHOWN UNDER A FIELD INDICATES THAT THAT FIELD IS REQUIRED TO HAVE THE VALUE OF x A ACKNOWLEDGE (THIS BIT POSITION MAY BE 0 FOR AN ACK OR 1 FOR A NACK) P STOP CONDITION PEC PACKET ERROR CODE MASTER TO SLAVE SLAVE TO MASTER ... CONTINUATION OF PROTOCOL 46861 F37
Figure 37. PMBus Packet Protocol Diagram Element Key
1 7 1 1 1 S SLAVE ADDRESS Rd/Wr A P 46861 F38
Figure 38. Quick Command Protocol
1 7 1 1 8 1 1 S SLAVE ADDRESS Wr A COMMAND CODE A P 46861 F39
Figure 39. Send Byte Protocol
1 7 1 1 8 1 8 1 1 S SLAVE ADDRESS Wr A COMMAND CODE A PEC A P 46861 F40
Figure 40. Send Byte Protocol with PEC
1 7 1 1 8 1 8 1 1 S SLAVE ADDRESS Wr A COMMAND CODE A DATA BYTE A P 46861 F41
Figure 41. Write Byte Protocol
1 7 1 1 8 1 8 1 8 1 1 S SLAVE ADDRESS Wr A COMMAND CODE A DATA BYTE A PEC A P 46861 F42
Figure 42. Write Byte Protocol with PEC
Rev. B 80 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Configurability and Readback Data Time-Averaged and Peak Readback Data Power Module Overview EEPROM Serial Interface Device Addressing Fault Detection and Handling Responses to VOUT and IOUT Faults Responses to Timing Faults Responses to SVIN OV Faults Responses to OT/UT Faults Responses to External Faults Fault Logging Bus Timeout Protection PMBus Command Summary PMBus Commands Applications Information VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization RCONFIG Pin-Straps (External Resistor Configuration Pins) Voltage Selection Connecting the USB to the I2C/SMBus/PMBus Controller to the LTM4686 In System LTpowerPlay: An Interactive GUI for Digital Power System Management PMBus Communication and Command Processing Thermal Considerations and Output Current Derating EMI Performance Safety Considerations Layout Checklist/Example Typical Applications Appendix A Similarity Between PMBus, SMBus and I2C 2-Wire Interface Appendix B PMBus Serial Digital Interface Appendix C: PMBus Command Details Addressing and Write Protect General Configuration Registers On/Off/Margin PWM Config Voltage Current Temperature Timing Fault Response Fault Sharing Scratchpad Identification Fault Warning and Status Telemetry NVM (EEPROM) Memory Commands Package Description Package Photographs Package Description Revision History Typical Application Design Resources Related Parts
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