Datasheet AOZ6762DI (Alpha & Omega) - 10

AOZ6762DI
Where C with C O is the output filter capacitor; c. Using selected crossover frequency, fC, to calculate R3: RL is load resistor value; V  2  C ESRCO is the equivalent series resistance of O o R  f   c C output capacitor; V G  G FB EA CS The compensation design is actually to shape the converter control loop transfer function to get desired where fC is desired crossover frequency. For best gain and phase. Several different types of compensation performance, fc is set to be about 1/10 of network can be used for the AOZ6762DI. For most cases, a series capacitor and resistor network connected switching frequency; to the COMP pin sets the pole-zero and is adequate for a V stable high-bandwidth control loop. FB is 0.6V; G In the AOZ6762DI, FB pin and COMP pin are the EA is the error amplifier transconductance, inverting input and the output of internal error amplifier. A GCS is the current sense circuit series R and C compensation network connected to COMP provides one pole and one zero. The pole is: transconductance, which is 5 A/V; The compensation capacitor Cc and resistor Rc together make a zero. This zero is put somewhere close to the GEA dominate pole f f  p1 but lower than 1/5 of selected p2  2  Cc  G crossover frequency. C VEA 2 can is selected by: Where G Equation above can also be simplified to: EA is the error amplifier transconductance, GVEA is the error amplifier voltage gain, Cc is compensation capacitor in figure1. C  R C O L  c Rc The zero given by the external compensation network, capacitor Cc and resistor Rc, is located at: An easy-to-use application software which helps to design and simulate the compensation loop can be found 1 f  at www.aosmd.com. Z 2  2  C  R c c To design the compensation circuit, a target crossover frequency fC for close loop must be selected. The system crossover frequency is where control loop has unity gain. The crossover is the also called the converter bandwidth. Generally a higher bandwidth means faster response to load transient. However, the bandwidth should not be too high because of system stability concern. When designing the compensation loop, converter stability under all line and load condition must be considered. Usually, it is recommended to set the bandwidth to be equal or less than 1/10 of switching frequency. The strategy for choosing Rc and Cc is to set the cross over frequency with Rc and set the compensator zero Rev. 1.0 October 2019
www.aosmd.com
Page 10 of 14