Datasheet BLF974P (Ampleon) - 2

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BLF974P HF / VHF power LDMOS transistor 2. Pinning information Table 2. Pinning Pin Description Simplified outline Graphic symbol
1 drain1 1 2 1 2 drain2 3 gate1 5 3 4 gate2 3 4 5 4 5 source [1] 2 sym117 [1] Connected to flange.
3. Ordering information Table 3. Ordering information Type number Package Name Description Version
BLF974P - flanged balanced ceramic package; 2 mounting holes; SOT539A 4 leads
4. Limiting values Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage - 108 V VGS gate-source voltage 6 +11 V Tstg storage temperature 65 +150 C Tj junction temperature [1] - 225 C [1] Continuous use at maximum temperature will affect the reliability, for details refer to the online MTF calculator.
5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Typ Unit
Rth(j-c) thermal resistance from junction to case Tcase = 90 C; PL = 500 W [1] 0.161 K/W Z [2] th(j-c) transient thermal impedance from Tcase = 90 C; tp = 100 s; 0.045 K/W junction to case  = 10 % [1] Rth(j-c) is measured under RF conditions. [2] See Figure 1. BLF974P All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2020. All rights reserved.
Product data sheet Rev. 1 — 26 March 2020 2 of 18
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Test information 7.1 Ruggedness in class-AB operation 7.2 Impedance information 7.3 Test circuit 7.4 Graphical data 7.4.1 1-Tone CW pulsed 7.4.2 1-Tone CW 7.4.3 2-Tone CW 8. Package outline 9. Handling information 10. Abbreviations 11. Revision history 12. Legal information 12.1 Data sheet status 12.2 Definitions 12.3 Disclaimers 12.4 Trademarks 13. Contact information 14. Contents