Datasheet AP64350Q (Diodes) - 3

AP64350Q Pin Descriptions Pin Name Pin Number Function
High-Side Gate Drive Boost Input. BST supplies the drive for the high-side N-Channel power MOSFET. A 100nF BST 1 capacitor is recommended from BST to SW to power the high-side driver. Power Input. VIN supplies the power to the IC as well as the step-down converter power MOSFETs. Drive VIN with a VIN 2 3.8V to 40V power source. Bypass VIN to GND with a suitably large capacitor to eliminate noise due to the switching of the IC. See
Input Capacitor
section for more details. Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator and low to EN 3 turn it off. Connect to VIN or leave floating for automatic startup. The EN has a precision threshold of 1.18V for programing the UVLO. See
Enable
section for more details. Resistor Timing and External Clock. This pin can be used to control the switching frequency by setting the internal oscillator frequency or by synchronizing to an external clock. Connect a resistor from RT/CLK to GND to set the internal oscillator frequency. An external clock can be input directly to the RT/CLK pin and the internal oscillator RT/CLK 4 synchronizes to the external clock frequency using a PLL. If the external clock edges stop, the operating mode automatically returns to resistor frequency programming. See
Programming Switching Frequency
section for more details. Feedback sensing terminal for the output voltage. Connect this pin to the resistive divider of the output. FB 5 See
Setting the Output Voltage
section for more details. Compensation. Connect an external RC network to the COMP pin to adjust the loop response. COMP 6 See
External Loop Compensation Design
section for more details. GND 7 Power Ground. Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter SW 8 from SW to the output load. EXPOSED Heat dissipation path of the die. The exposed thermal pad must be electrically connected to GND and must be 9 PAD connected to the ground plane of the PCB for proper operation and optimized thermal performance. AP64350Q 3 of 26 June 2020 Document number: DS42745 Rev. 1 - 2
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