link to page 1 link to page 1 link to page 1 link to page 1 link to page 2 link to page 3 link to page 7 link to page 7 link to page 8 link to page 9 link to page 15 link to page 15 link to page 16 link to page 17 link to page 17 link to page 17 link to page 17 link to page 18 link to page 18 link to page 18 link to page 19 link to page 19 link to page 19 link to page 20 link to page 20 link to page 20 link to page 23 link to page 24 link to page 25 link to page 25 link to page 25 link to page 26 link to page 27 link to page 28 link to page 28 ADL5902Data SheetTABLE OF CONTENTS Features .. 1 VSET Interface .. 18 Applications ... 1 Output Interface ... 18 Functional Block Diagram .. 1 VTGT Interface .. 19 General Description ... 1 Basis for Error Calculations .. 19 Revision History ... 2 Measurement Mode Basic Connections.. 19 Specifications ... 3 Setting VTADJ .. 20 Absolute Maximum Ratings .. 7 Setting VTGT ... 20 ESD Caution .. 7 Choosing a Value for CLPF .. 20 Pin Configuration and Function Descriptions ... 8 Output Voltage Scaling .. 23 Typical Performance Characteristics ... 9 System Calibration and Error Calculation .. 24 Theory of Operation .. 15 High Frequency Performance ... 25 Square Law Detector and Amplitude Target .. 15 Low Frequency Performance .. 25 RF Input Interface .. 16 Description of Characterization ... 25 Small Signal Loop Response ... 17 Evaluation Board Schematics and Artwork .. 26 Temperature Sensor Interface ... 17 Assembly Drawings .. 27 VREF Interface ... 17 Outline Dimensions ... 28 Temperature Compensation Interface ... 17 Ordering Guide .. 28 Power-Down Interface ... 18 REVISION HISTORY8/2016—Rev. A to Rev. B Changes to Figure 2 .. 8 Updated Outline Dimensions ... 28 Changes to Ordering Guide .. 28 7/2011—Rev. 0 to Rev. A Updated Format .. Universal Changes to Measurement Mode Basic Connections Section and Figure 45 .. 19 Changes to Setting VTGT Section and Choosing a Value for CLPF Section .. 20 Changes to Output Voltage Scaling Section, Figure 49, and Table 7 .. 23 Changes to Figure 54 and Table 8 ... 26 Changes to Figure 55 and Figure 56 ... 27 4/2010—Revision 0: Initial Version Rev. B | Page 2 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SQUARE LAW DETECTOR AND AMPLITUDE TARGET RF INPUT INTERFACE SMALL SIGNAL LOOP RESPONSE TEMPERATURE SENSOR INTERFACE VREF INTERFACE TEMPERATURE COMPENSATION INTERFACE POWER-DOWN INTERFACE VSET INTERFACE OUTPUT INTERFACE VTGT INTERFACE BASIS FOR ERROR CALCULATIONS MEASUREMENT MODE BASIC CONNECTIONS SETTING VTADJ SETTING VTGT CHOOSING A VALUE FOR CLPF OUTPUT VOLTAGE SCALING SYSTEM CALIBRATION AND ERROR CALCULATION HIGH FREQUENCY PERFORMANCE LOW FREQUENCY PERFORMANCE DESCRIPTION OF CHARACTERIZATION EVALUATION BOARD SCHEMATICS AND ARTWORK ASSEMBLY DRAWINGS OUTLINE DIMENSIONS ORDERING GUIDE
