Datasheet ADN8835 (Analog Devices) - 10

ADN8835 Data Sheet 0.10 1.0 TA = 55°C VIN = 5V, ITEC = 0.5A, HEATING 0.08 TA = 45°C 0.8 VIN = 5V, ITEC = 0A %) TA = 35°C VIN = 5V, ITEC = 0.5A, COOLING R ( 0.06 TA = 25°C 0.6 VIN = 3.3V, ITEC = 0.5A, HEATING TA = 15°C VIN = 3.3V, ITEC = 0.0A RRO 0.04 V E 0.4 IN = 3.3V, ITEC = 0.5A, COOLING E AG 0.02 0.2 T L %) O ( 0 F 0 ) V RE 1 V –0.02 UT –0.2 O (V –0.04 T –0.4 U –0.06 –0.6 EMPO T –0.08 –0.8 –0.10
1
–1.0 0 20 40 60 80 100 120 140 160 180 200
1 0
0 1 2 3 4 5
014
TIME (Seconds)
14174-
LOAD CURRENT AT VREF (mA)
14174- Figure 11. Thermal Stability (TEMPOUT) Voltage Error at Various Ambient Figure 14. VREF Load Regulation Temperatures, VIN = 3.3 V, VTEMPSET = 1 V
0.10 20 TA = 55°C 0.08 TA = 45°C %) T 15 A = 35°C %) R ( 0.06 TA = 25°C T R ( A = 15°C 10 RRO 0.04 E RRO E E 5 AG 0.02 T NG L O 0 ADI 0 ) V 1 RE –0.02 UT NT O –5 (V –0.04 T U –10 –0.06 C CURRE E EMPO IT –15 T –0.08 VIN = 5V VIN = 3.3V –0.10 –20 0 20 40 60 80 100 120 140 160 180 200
012
0 0.5 1.0 1.5 2.0 2.5 3.0
015
TIME (Seconds) TEC CURRENT (A)
14174- 14174- Figure 12. Thermal Stability (TEMPOUT) Voltage Error at Various Ambient Figure 15. ITEC Current Reading Error vs. TEC Current in Cooling Mode Temperatures, VIN = 3.3 V, VTEMPSET = 1.5 V
1.0 20 VIN = 5.5V AT NO LOAD 0.8 VIN = 3.3V AT NO LOAD V 15 IN = 2.7V AT NO LOAD %) 0.6 VIN = 5.5V AT 5mA LOAD R ( VIN = 3.3V AT 5mA LOAD 10 0.4 VIN = 2.7V AT 5mA LOAD RRO E %) 5 0.2 R ( NG 0 ADI 0 RRO E RE F –0.2 NT RE –5 V –0.4 –10 –0.6 C CURRE E IT –15 –0.8 VIN = 5V VIN = 3.3V –1.0 –20 –50 0 50 100 150
013
0 0.5 1.0 1.5 2.0 2.5 3.0
016
AMBIENT TEMPERATURE (°C) TEC CURRENT (A)
14174- 14174- Figure 13. VREF Error vs. Ambient Temperature Figure 16. ITEC Current Reading Error vs. TEC Current in Heating Mode Rev. B | Page 10 of 27 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY DETAILED FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG PID CONTROL DIGITAL PID CONTROL POWERING THE CONTROLLER ENABLE AND SHUTDOWN OSCILLATOR CLOCK FREQUENCY External Clock Operation Connecting Multiple ADN8835 Devices TEMPERATURE LOCK INDICATOR SOFT START ON POWER-UP TEC VOLTAGE/CURRENT MONITOR Voltage Monitor Current Monitor MAXIMUM TEC VOLTAGE LIMIT Using a Resistor Divider to Set the TEC Voltage Limit MAXIMUM TEC CURRENT LIMIT Using a Resistor Divider to Set the TEC Current Limit APPLICATIONS INFORMATION SIGNAL FLOW THERMISTOR SETUP THERMISTOR AMPLIFIER (CHOPPER 1) PID COMPENSATION AMPLIFIER (CHOPPER 2) MOSFET DRIVER AMPLIFIERS PWM OUTPUT FILTER REQUIREMENTS Inductor Selection Capacitor Selection INPUT CAPACITOR SELECTION POWER DISSIPATION PWM Regulator Power Dissipation Conduction Loss (PCOND) Switching Losses (PSW) Transition Losses (PTRAN) Linear Regulator Power Dissipation THERMAL CONSIDERATION PCB LAYOUT GUIDELINES BLOCK DIAGRAMS AND SIGNAL FLOW GUIDELINES FOR REDUCING NOISE AND MINIMIZING POWER LOSS General PCB Layout Guidelines PWM Power Stage Layout Guidelines Linear Power Stage Layout Guidelines Placing the Thermistor Amplifier and PID Components EXAMPLE PCB LAYOUT USING TWO LAYERS OUTLINE DIMENSIONS ORDERING GUIDE