link to page 1 link to page 1 link to page 1 link to page 1 link to page 2 link to page 3 link to page 3 link to page 5 link to page 6 link to page 6 link to page 6 link to page 7 link to page 8 link to page 10 link to page 10 link to page 10 link to page 10 link to page 11 link to page 11 link to page 11 link to page 12 link to page 12 link to page 13 link to page 14 link to page 14 ADCMP603Data SheetTABLE OF CONTENTS Features .. 1 Application Information .. 10 Applications ... 1 Power/Ground Layout and Bypassing ... 10 Functional Block Diagram .. 1 TTL-/CMOS-Compatible Output Stage ... 10 General Description ... 1 Using/Disabling the Latch Feature ... 10 Revision History ... 2 Optimizing Performance ... 11 Specifications ... 3 Comparator Propagation Delay Dispersion ... 11 Electrical Characteristics ... 3 Comparator Hysteresis .. 11 Timing Information ... 5 Crossover Bias Point .. 12 Absolute Maximum Ratings .. 6 Minimum Input Slew Rate Requirement .. 12 Thermal Resistance .. 6 Typical Application Circuits ... 13 ESD Caution .. 6 Outline Dimensions ... 14 Pin Configuration and Function Descriptions ... 7 Ordering Guide .. 14 Typical Performance Characteristics ... 8 REVISION HISTORY 4/16—Rev. 0 to Rev. A Changes to Figure 3 and Table 5 ... 7 Updated Outline Dimensions ... 14 Changes to Ordering Guide .. 14 10/06—Revision 0: Initial Version Rev. A | Page 2 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS TIMING INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE USING/DISABLING THE LATCH FEATURE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
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