Datasheet ADCMP604, ADCMP605 (Analog Devices) - 8
Производитель | Analog Devices |
Описание | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply LVDS Comparators |
Страниц / Страница | 14 / 8 — ADCMP604/ADCMP605. Data Sheet. TYPICAL PERFORMANCE CHARACTERISTICS. 800. … |
Версия | C |
Формат / Размер файла | PDF / 357 Кб |
Язык документа | английский |
ADCMP604/ADCMP605. Data Sheet. TYPICAL PERFORMANCE CHARACTERISTICS. 800. 1.60. 600. 1.50. OUTPUT HI. 400. 1.40. CC = 2.5V. CC = 5.5V. 200. µ (
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Текстовая версия документа
ADCMP604/ADCMP605 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS
VCCI = VCCO = 2.5 V, TA = 25°C, unless otherwise noted.
800 1.60 600 1.50 OUTPUT HI 400 V V 1.40 CC = 2.5V CC = 5.5V A) 200 µ ( (V) 1.30 T OUTPUT VCM NT 0 PU T 1.20 U O CURRE –200 1.10 –400 OUTPUT LO 1.00 –600 –800 0.90
011
–1 0 1 2 3 4 5 6 7
010
2.4 2.9 3.4 3.9 4.4 4.9 5.4 5.9 LE/HYS PIN (V) V
05916-
CCO (V)
05916- Figure 5. LE/HYS Pin Current vs. Voltage Figure 8. LVDS Output Level vs. VCCO (V)
200 850 800 150 750 100 V V 700 ) A) CC = 2.5V CC = 5.5V µ ps +125°C ( 50 650 NT LL ( 0 /FA 600 E CURRE IS R +25°C 550 –50 –40°C 500 –100 450 –150 400 –1 0 1 2 3 4 5 6 7
006
2.40 2.80 3.20 3.60 4.00 4.40 4.80 5.20 5.60 6.00
007
SDN PIN (V)
05916-
VCCO (V)
05916- Figure 6. SDN Pin Current vs. Voltage Figure 9. LVDS Output Rise/Fall Time vs. VCCO (V)
10 250 +125°C 8 +25°C 6 200 4 –40°C V) 2 150 S (m A) µ 0 ( ESI I B ER –2 100 YST H –4 VCC = 2.5V –6 50 –8 VCC = 5.5V –10 0 –1.0 –0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
009
50 100 150 200 250 300 350 400 450 500
008
VCM AT VCC = 2.5V HYSTERESIS RESISTOR (kΩ)
05916- 05916- Figure 10. Hysteresis vs. Hysteresis Resistor Figure 7. Input Bias Current vs. Input Common-Mode Voltage Rev. C | Page 8 of 14 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS TIMING INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING LVDS-COMPATIBLE OUTPUT STAGE USING/DISABLING THE LATCH FEATURE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS CROSSOVER BIAS POINTS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE