Datasheet ADCMP572, ADCMP573 (Analog Devices) - 2

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ADCMP572/ADCMP573 Data Sheet TABLE OF CONTENTS
Features .. 1 Power/Ground Layout and Bypassing ..9 Applications ... 1 CML/RSPECL Output Stage ..9 Functional Block Diagram .. 1 Using/Disabling the Latch Feature ..9 General Description ... 1 Optimizing High Speed Performance ... 10 Revision History ... 2 Comparator Propagation Delay Dispersion ... 10 Electrical Characteristics ... 3 Comparator Hysteresis .. 11 Absolute Maximum Ratings .. 5 Minimum Input Slew Rate Requirements .. 11 Thermal Considerations .. 5 Typical Application Circuits ... 12 ESD Caution .. 5 Timing Information ... 13 Pin Configuration and Function Descriptions ... 6 Outline Dimensions ... 14 Typical Performance Characteristics ... 7 Ordering Guide .. 14 Applications Information .. 9
REVISION HISTORY 3/15—Rev. A to Rev. B
Changes to Figure 2 and Table 3 ... 6 Changes to Figure 23 .. 12 Updated Outline Dimensions ... 14 Changes to Ordering Guide .. 14
4/09—Rev. 0 to Rev. A
Changes to Figure 26 .. 12 Updated Outline Dimensions ... 14 Changes to Ordering Guide .. 14
4/05—Revision 0: Initial Version
Rev. B | Page 2 of 14 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING CML/RSPECL OUTPUT STAGE USING/DISABLING THE LATCH FEATURE OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATIONDELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENTS TYPICAL APPLICATION CIRCUITS TIMING INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE