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Datasheet ADCMP565 (Analog Devices)

ПроизводительAnalog Devices
ОписаниеDual Ultrafast Voltage Comparator
Страниц / Страница16 / 1 — FEATURES. FUNCTIONAL BLOCK DIAGRAM. 300 ps propagation delay input to …
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Язык документаанглийский

FEATURES. FUNCTIONAL BLOCK DIAGRAM. 300 ps propagation delay input to output. 50 ps propagation delay dispersion. NONINVERTING

Datasheet ADCMP565 Analog Devices

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Dual Ultrafast Voltage Comparator ADCMP565
FEATURES FUNCTIONAL BLOCK DIAGRAM 300 ps propagation delay input to output 50 ps propagation delay dispersion NONINVERTING Differential ECL compatible outputs Q OUTPUT INPUT ADCMP565 Differential latch control INVERTING Q OUTPUT INPUT Robust input protection Input common-mode range −2.0 V to +3.0 V LATCH ENABLE LATCH ENABLE Input differential range ±5 V INPUT INPUT Power supply sensitivity greater than 65 dB
02820-0-001
200 ps minimum pulsewidth
Figure 1.
5 GHz equivalent input rise time bandwidth Typical output rise/fall of 160 ps GENERAL DESCRIPTION SPT 9689 replacement
The ADCMP565 is an ultrafast voltage comparator fabricated on Analog Devices’ proprietary XFCB process. The device
APPLICATIONS
features 300 ps propagation delay with less than 50 ps overdrive
High speed instrumentation
dispersion. Overdrive dispersion, a particularly important
Scope and logic analyzer front ends
characteristic of high speed comparators, is a measure of the
Window comparators
difference in propagation delay under differing overdrive
High speed line receivers and signal restoration
conditions.
Threshold detection
A fast, high precision differential input stage permits consis-
Peak detection
tent propagation delay with a wide variety of signals in the
High speed triggers
common-mode range from −2.0 V to +3.0 V. Outputs are
Patient diagnostics
complementary digital signals fully compatible with ECL 10 K
Disk drive read channel detection
and 10 KH logic families. The outputs provide sufficient drive
Hand-held test instruments
current to directly drive transmission lines terminated in 50 Ω
Zero-crossing detectors
to −2 V. A latch input is included, which permits tracking,
Clock drivers
track-and-hold, or sample-and-hold modes of operation.
Automatic test equipment
The ADCMP565 is available in a 20-lead PLCC package.
Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. or otherwise under any patent or patent rights of Analog Devices. Trademarks and Tel: 781.329.4700 www.analog.com registered trademarks are the property of their respective owners. Fax: 781.326.8703 © 2003 Analog Devices, Inc. All rights reserved.
Document Outline SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TIMING INFORMATION APPLICATION INFORMATION CLOCK TIMING RECOVERY OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
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