Datasheet ADP1720 (Analog Devices) - 6

ADP1720 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS GND 1 8 GND ADJ 1 8 GND ADP1720 ADP1720 IN 2 7 GND IN 2 7 GND FIXED ADJUSTABLE OUT 3 6 GND OUT 3 6 GND TOP VIEW
4 03
TOP VIEW
0
(Not to Scale)
-00 1-
EN 4 5 GND EN 4 (Not to Scale) 5 GND
1 11 11 06 06 Figure 3. 8-Lead MSOP Figure 4. 8-Lead MSOP
Table 4. Pin Function Descriptions ADP1720 ADP1720 Fixed Adjustable Pin No. Pin No. Mnemonic Description
1 N/A GND This pin is internally connected to ground. N/A 1 ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage. 2 2 IN Regulator Input Supply. Bypass IN to GND with a 1 μF or greater capacitor. 3 3 OUT Regulated Output Voltage. Bypass OUT to GND with a 1 μF or greater capacitor. 4 4 EN Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to IN. 5 5 GND Ground. 6 6 GND Ground. 7 7 GND Ground. 8 8 GND Ground. Rev. A | Page 6 of 16 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ADJUSTABLE OUTPUT VOLTAGE(ADP1720 ADJUSTABLE) APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE