Datasheet XDPL8219 (Infineon) - 6

XDPL8219 Digital Flyback Controller IC XDP™ Digital Power 2 Functional block diagram 2 Functional block diagram
The functional block diagram shows the basic data flow from input pins via signal processing to the output pins.
Flyback (with PFC)
Input voltage estimation VCC charging Line HV ZCD synchronization VCC Output voltage Output current VCC CS management estimation estimation UART UART parametrization PFC and THD GD and reporting correction Feedback Temperature Multimode sensing & FB protection controller filter
Figure 3 XDPL8219 functional block diagram
Data Sheet 6 Revision 1.1 2020-08-26 Document Outline Features Product validation Potential applications Description Table of contents 1 Pin configuration 2 Functional block diagram 3 Functional description 3.1 Startup 3.2 Regulated mode 3.3 Operation cycle 3.4 Line synchronization 3.5 Enhanced power quality 3.6 Switching frequency dithering for constant DC input voltage 3.7 Configurable gate voltage rising slope at GD pin 3.8 UART reporting 3.9 Input voltage and output voltage estimation 3.9.1 Output voltage estimation 3.9.2 Input voltage estimation 3.10 Protection features 3.10.1 Primary MOSFET overcurrent protection 3.10.2 Output undervoltage protection 3.10.3 Output overvoltage protection 3.10.4 Transformer demagnetization time shortage protection 3.10.5 Minimum input voltage startup check and input undervoltage protection 3.10.6 Maximum input voltage startup check and input overvoltage protection 3.10.7 VCC undervoltage lockout 3.10.8 VCC undervoltage protection 3.10.9 VCC overvoltage protection 3.10.10 IC overtemperature protection 3.10.11 Other protections 3.10.12 Protection reactions 3.11 Debug mode 4 List of Parameters 5 Electrical Characteristics and Parameters 5.1 Package Characteristics 5.2 Absolute Maximum Ratings 5.3 Operating Conditions 5.4 DC Electrical characteristics 6 Package Dimensions 7 References 8 Revision History Glossary ABM ADC BOM CCM CRC CV DCM EMI FB GUI HID IC IIR OCP1 OTP PCB PC PFC PF PWM QRM1 QRMn RAM SSR THD UART USB UVLO Disclaimer