Datasheet AD622 (Analog Devices) - 8

AD622 Data Sheet 10kΩ 1kΩ 10kΩ INPUT 0.01% POT 0.1% 20V p-p VOUT 100 100kΩ 0.1% 90 +VS 2 11kΩ 1kΩ 100Ω 7 0.1% 0.1% 0.1% Ø 1 G = 1000 G = 1 AD622 6 8 5 G = 100 G = 10 10 3 4 1Ω 0% 51. 511Ω 62kΩ 5. –VS
015
10µV 2V
014 00777- 00777- Figure 14. Gain Nonlinearity, G = 1, RL = 10 kΩ (20 µV = 2 ppm) Figure 15. Settling Time Test Circuit Rev. E | Page 8 of 16 Document Outline Features Applications Pin Configuration General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Theory of Operation Make vs. Buy: A Typical Application Error Budget Gain Selection Input and Output Offset Voltage Reference Terminal Input Protection RF Interference Ground Returns for Input Bias Currents Outline Dimensions Ordering Guide