Datasheet ADA4817-1, ADA4817-2 (Analog Devices) - 31

Data Sheet ADA4817-1 /ADA4817-2 DETAIL A (JEDEC 95) 4.10 0.35 4.00 SQ 0.30 PIN 1 INDICATOR 3.90 0.25 AREA P IN 1 13 16 IN D IC AT O R AR E A OP T IO N S 0.65 (SEE DETAIL A) 12 1 BSC *2.40 EXPOSED 2.35 SQ PAD 2.30 9 4 8 5 0.50 0.20 MIN TOP VIEW 0.40 BOTTOM VIEW 0.30 0.80 FOR PROPER CONNECTION OF 0.75 SIDE VIEW THE EXPOSED PAD, REFER TO 0.05 MAX THE PIN CONFIGURATION AND 0.70 0.02 NOM FUNCTION DESCRIPTIONS COPLANARITY SECTION OF THIS DATA SHEET. SEATING 0.08 PLANE 0.20 REF C 2018- * -004024 COMPLIANT TO JEDEC STANDARDS MO-220-WGGC-3 24- G K WITH EXCEPTION TO THE EXPOSED PAD 08- P
Figure 73.16-Lead Lead Frame Chip Scale Package [LFCSP] 4 mm × 4 mm Body and 0.75 mm Package Height (CP-16-20) Dimensions shown in millimeters
ORDERING GUIDE Temperature Package Ordering Marking Model1 Range Package Description Option Quantity Code
ADA4817-1ACPZ-RL −40°C to +105°C 8-Lead Lead Frame Chip Scale Package [LFCSP] CP-8-13 5000 H1F ADA4817-1ACPZ-R7 −40°C to +105°C 8-Lead Lead Frame Chip Scale Package [LFCSP] CP-8-13 1500 H1F ADA4817-1ARDZ −40°C to +105°C 8-Lead Standard Small Outline Package with Exposed Pad RD-8-1 1 ADA4817-1ARDZ-RL −40°C to +105°C 8-Lead Standard Small Outline Package with Exposed Pad RD-8-1 2500 ADA4817-1ARDZ-R7 −40°C to +105°C 8-Lead Standard Small Outline Package with Exposed Pad RD-8-1 1000 ADA4817-2ACPZ-RL −40°C to +105°C 16-Lead Lead Frame Chip Scale Package [LFCSP] CP-16-20 5000 ADA4817-2ACPZ-R7 −40°C to +105°C 16-Lead Lead Frame Chip Scale Package [LFCSP] CP-16-20 1500 ADA4817-2ACP-EBZ Evaluation Board for 16-Lead LFCSP 1 Z = RoHS Compliant Part.
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Rev. G | Page 31 of 31 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PAD LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE