Datasheet ADP1851 (Analog Devices) - 3

Data Sheet ADP1851 SIMPLIFIED BLOCK DIAGRAM VIN VCCO OV AGND THERMAL LDO REF 0.6V (EPAD) SHUTDOWN UV VCCO UVLO OV 0.63V LOGIC UV LOGIC EN_SW 12.5kΩ EN OV_TH PGOOD FB SYNC 1MΩ UV_TH PH OSCILLATOR FREQ COMP VCCO FB – ERROR AMPLIFIER SS/TRK + PH BST + EN_SW DH VREF = 0.6V OVER_LIM OV DRIVER LOGIC – CONTROL AND VCCO PULSE SKIP SW STATE 6.5µA 0.9V + MACHINE VCCO LOGIC OV FAULT – DL 3kΩ EN OVER_LIM + PWM COMPARATOR CS GAIN DCM + SLOPE COMPENSATION ZERO – PGND RAMP AND RAMP GENERATOR CROSS DETECT AV = 0*, 3, 6, 12 – CURRENT SENSE AMPLIFIER + VCCO + CURRENT-LIMIT 50µA OVER_LIM CONTROL – ILIM
002
*0 (ZERO) GAIN IS FOR VOLTAGE MODE WITH RAMP FROM 0.7V TO 2.2V.
10595- Figure 2. Simplified Block Diagram Rev. B | Page 3 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL OPERATION CIRCUIT REVISION HISTORY SIMPLIFIED BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONTROL ARCHITECTURE OSCILLATOR FREQUENCY SYNCHRONIZATION PWM AND PULSE SKIP MODES OF OPERATION SYNCHRONOUS RECTIFIER AND DEAD TIME INPUT UNDERVOLTAGE LOCKOUT INTERNAL LINEAR REGULATOR OVERVOLTAGE PROTECTION POWER GOOD SHORT-CIRCUIT AND CURRENT-LIMIT PROTECTION ENABLE/DISABLE CONTROL THERMAL OVERLOAD PROTECTION APPLICATIONS INFORMATION ADIsimPower DESIGN TOOL SETTING THE OUTPUT VOLTAGE SOFT START SETTING THE CURRENT LIMIT ACCURATE CURRENT-LIMIT SENSING INPUT CAPACITOR SELECTION VIN PIN FILTER BOOST CAPACITOR SELECTION INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION MOSFET SELECTION LOOP COMPENSATION—VOLTAGE MODE Type III Compensation LOOP COMPENSATION—CURRENT MODE Setting the Slope Compensation Setting the Current Sense Gain Type II Compensation SWITCHING NOISE AND OVERSHOOT REDUCTION VOLTAGE TRACKING Coincident Tracking Ratiometric Tracking PCB LAYOUT GUIDELINES TYPICAL OPERATING CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE