ADP1821OUTPUT VOLTAGE(1V/DIV)OUTPUT VOLTAGE(50mV/DIV)SHDN (5V/DIV)INPUT VOLTAGE(5V/DIV)PWGD (5V/DIV) 11 13 -0 -0 10 10 53 53 0 0 Figure 11. Line Transient Response, 10 V to 16 V Figure 13. Power-On Response, Prebiased Output OUTPUT VOLTAGE(1V/DIV)OUTPUT VOLTAGE(1V/DIV)SHDN (5V/DIV)LOAD CURRENT(10A/DIV)PWGD (5V/DIV) 12 14 -0 -0 10 10 53 53 0 0 Figure 12. Power-On Response Figure 14. Output Short-Circuit Response and Recovery Rev. C | Page 8 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION SIMPLIFIED BLOCK DIAGRAM PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SOFT START ERROR AMPLIFIER CURRENT-LIMIT SCHEME MOSFET DRIVERS INPUT VOLTAGE RANGE SETTING THE OUTPUT VOLTAGE SWITCHING FREQUENCY CONTROL AND SYNCHRONIZATION COMPENSATION POWER-GOOD INDICATOR THERMAL SHUTDOWN SHUTDOWN CONTROL APPLICATION INFORMATION SELECTING THE INPUT CAPACITOR OUTPUT LC FILTER SELECTING THE MOSFETS SETTING THE CURRENT LIMIT FEEDBACK VOLTAGE DIVIDER COMPENSATING THE VOLTAGE MODE BUCK REGULATOR Type II Compensator Type III Compensator SETTING THE SOFT START PERIOD PCB LAYOUT GUIDELINE RECOMMENDED COMPONENT MANUFACTURERS APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
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