Datasheet AP63356Q, AP63357Q (Diodes) - 3

AP63356Q/AP63357Q Pin Descriptions Pin Name Pin Number Function
Power Input. VIN supplies the power to the IC as well as the step-down converter power MOSFETs. Drive VIN with a VIN 1 3.8V to 32V power source. Bypass VIN to GND with a suitably large capacitor to eliminate noise due to the switching of the IC. See
Input Capacitor
section for more details. Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator and low to EN 2 turn it off. Connect to VIN or leave floating for automatic startup. The EN has a precision threshold of 1.18V for programing the UVLO. See
Enable
section for more details. Feedback sensing terminal for the output voltage. Connect this pin to the resistive divider of the output. FB 3 See
Setting the Output Voltage
section for more details. Compensation. Connect the COMP pin to GND to use internal loop compensation. Connect an external RC network COMP 4 to the COMP pin to adjust the loop response. See
External Loop Compensation Design
section for more details. Power-Good. Open-drain power-good output with internal 5M pull-up resistor that is pulled to GND when the output PG 5 voltage is out of its regulation limits or during soft-start. High-Side Gate Drive Boost Input. BST supplies the drive for the high-side N-Channel power MOSFET. A 100nF BST 6 capacitor is recommended from BST to SW to power the high-side driver. NC 7 No Connect. There is no internal connection to this pin. The pin can be tied to any other pin or left floating. GND 8 Power Ground. Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter SW 9 from SW to the output load.
Functional Block Diagram I1 I2 1.5μA 4μA VCC VCC 1 VIN Regulator 20kΩ EN 2 + ON Internal 0.8V 1.18V – Reference R + T = 0.2V/A CSA - 6 BST + OCP Ref SE - = 0.83V/T Q1 FB 3 + 450kHz + UVP UVP 0.64V - OSC Oscillator 9 SW Q2 - VSUM + 0.8V Control + - Logic VCC Internal SS + Error PWM Amplifier Comparator 5MΩ GND Thermal TSD 5 PG Detection Shutdown 18kΩ COMP 4 OSC 7.6nF 8 GND Figure 4. Functional Block Diagram
AP63356Q/AP63357Q 3 of 28 September 2020 Document number: DS41948 Rev. 1 - 2
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