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Datasheet 1ED34x1Mc12M (1ED-X3 Analog) (Infineon) - 2

ПроизводительInfineon
ОписаниеEiceDRIVER/ 1ED34x1Mc12M Enhanced. Single-channel isolated gate driver IC with adjustable DESAT and soft-off
Страниц / Страница45 / 2 — EiceDRIVER™ 1ED34x1Mc12M Enhanced. Datasheet. Device information. Product …
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Язык документаанглийский

EiceDRIVER™ 1ED34x1Mc12M Enhanced. Datasheet. Device information. Product type. Output current. CLAMP type1)

EiceDRIVER™ 1ED34x1Mc12M Enhanced Datasheet Device information Product type Output current CLAMP type1)

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EiceDRIVER™ 1ED34x1Mc12M Enhanced Datasheet Device information Device information Product type Output current CLAMP type1) Isolation class Marking OPN
1ED3431MC12M 3 A (typ) CLAMP reinforced 3431MC12 coming soon 1ED3461MC12M 6 A (typ) CLAMPDRV reinforced 3461MC12 coming soon 1ED3491MC12M 9 A (typ) CLAMPDRV reinforced 3491MC12 coming soon 1ED3431MU12M 3 A (typ) CLAMP UL 1577 3431MU12
1ED3431MU12MXUMA1
1ED3461MU12M 6 A (typ) CLAMPDRV UL 1577 3461MU12
1ED3461MU12MXUMA1
1ED3491MU12M 9 A (typ) CLAMPDRV UL 1577 3491MU12
1ED3491MU12MXUMA1 Description
The 1ED34x1Mc12M family (X3 Analog) consists of galvanically isolated single channel gate driver ICs in a small PG-DSO-16 package with a large creepage and clearance of 8 mm. The gate driver ICs provide a typical peak output current of 3 A, 6 A, and 9 A. Adjustable control and protection functions are included to simplify the design of highly reliable systems. All parameter adjustments are done from the input side, including adjustable DESAT filter time, leading edge blanking time, and soft-off current level with only two resistors.. All logic I/O pins are supply voltage dependent 3.3 V or 5 V CMOS compatible and can be directly connected to a microcontroller. The data transfer across the galvanic isolation is realized by the integrated coreless transformer technology. VCC1 VCC2H IN,H DESAT,H RDYC, FLT_N
EiceDRIVER
TM ON,H DESAT SoftOff ADJ,H OFF.H CLAMP,H GND2,H
CPU
GND1 VEE2,H VCC1 VCC2,L IN,L DESAT,L RDYC, FLT_N
EiceDRIVER
TM ON,L DESAT SoftOff ADJ,L OFF,L CLAMP,L GND2,L GND1 VEE2,L
Figure 1 Typical application
1 Please refer to
Chapter 4.5.4.1
for circuit connection to avoid damage to the gate driver IC Datasheet 2 v2.0 2020-03-26 Document Outline Table of contents 1 Block diagram 2 Related products 3 Pin configuration and functionality 3.1 Pin configuration 3.2 Pin functionality 4 Functional description 4.1 Start-up and fault clearing 4.2 Supply 4.2.1 Input side undervoltage lockout, VCC1 UVLO 4.2.2 Output side under-voltage lockout, VCC2 UVLO 4.3 Input side logic 4.3.1 IN non-inverting driver input 4.3.2 RDYC ready status output, fault-off and fault clear input 4.3.2.1 RDYC fault-off input 4.3.2.2 RDYC fault clear input 4.3.3 FLT_N status output and fault-off input 4.3.3.1 FLT_N fault-off input 4.4 Desaturation protection 4.4.1 DESAT behavior 4.4.2 DESAT filter and leading edge blanking time adjustment with ADJB 4.5 Gate driver output 4.5.1 Turn-on behavior 4.5.2 Turn-off and fault turn-off behavior 4.5.2.1 Hard switching turn-off 4.5.2.2 Soft turn-off 4.5.2.2.1 Soft-off current source adjustment with ADJA 4.5.3 Active shut-down 4.5.4 Active Miller clamp 4.5.4.1 CLAMP output types 4.5.5 Switch-off timeout until forced switch-off 4.6 Short circuit clamping 5 Electrical parameters 5.1 Absolute maximum ratings 5.2 Thermal parameters 5.3 Operating parameters 5.4 Electrical characteristics 5.4.1 Voltage supply 5.4.2 Logic input and output 5.4.3 Analog input 5.4.4 Gate driver 5.4.5 Active Miller clamp 5.4.6 Dynamic characteristics 5.4.7 Desaturation protection 5.4.8 Soft-off current source 5.4.9 Over-temperature protection 6 Insulation characteristics 6.1 Certified according to VDE 0884-11 and IEC 60747-17 reinforced insulation (planned) 6.2 Recognized under UL 1577 (planned) 6.3 Reliability 7 Package information 8 Application notes 8.1 Reference layout for thermal data 8.2 Printed circuit board guidelines Revision history Disclaimer
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